Abstract: An output circuit for producing 5 volt output signals from a chip that is manufactured in a 3 volt process, is provided with a control signal logic circuit, a pseudoground generating circuit, and an output signal generation circuit. The control signal logic circuit receives 3 volt data signals from the internal logic circuitry of the chip, and produces control signals as a function of these 3 volt data signals. The pseudoground generating circuit is coupled to the control signal logic circuit and generates a pseudoground greater than zero volts and intermediate output signals as a function of the control signals produced by the control signal logic circuit. The output signal generation circuit is coupled to the pseudoground generating circuit and generates the 5 volt output signals as a function of the intermediate output signals generated by the pseudoground generating circuit.