Abstract: Exemplary semiconductor processing methods may include providing one or more deposition precursors to a processing region of a semiconductor processing chamber. The methods may include contacting a substrate housed in the processing region with the one or more deposition precursors. The methods may include forming a silicon-containing material on the substrate. The methods may include providing a fluorine-containing precursor to the processing region of the semiconductor processing chamber. The methods may include contacting the silicon-containing material on the substrate with the fluorine-containing precursor to form a fluorine-treated silicon-containing material. The methods may include contacting the fluorine-treated silicon-containing material with plasma effluents of argon or diatomic nitrogen.

Abstract: Memory devices and methods of forming memory devices are described. Methods of forming electronic devices are described where a spacer is formed around each of the bit line contact pillars, the spacer in contact with the spacer of an adjacent bit line contact pillar. A doped layer is then epitaxially grown on the memory stack and bit line is formed on the memory stack. The bit line is self-aligned with the active region.

Abstract: Three-dimensional dynamic random-access memory (3D DRAM) structures and methods of formation of same are provided herein. In some embodiments, a 3D DRAM stack can include alternating silicon (Si) layers and silicon germanium (SiGe) layers. Each of the Si layers may have a height greater than a height of each of the SiGe layers. Methods and systems for formation of such structures are further provided.

Abstract: Memory devices and methods of forming memory devices are described. The memory devices comprise a silicon nitride hard mask layer on a ruthenium layer. Forming the silicon nitride hard mask layer on the ruthenium comprises pre-treating the ruthenium layer with a plasma to form an interface layer on the ruthenium layer; and forming a silicon nitride layer on the interface layer by plasma-enhanced chemical vapor deposition (PECVD). Pre-treating the ruthenium layer, in some embodiments, results in the interface layer having a reduced roughness and the memory device having a reduced resistivity compared to a memory device that does not include the interface layer.

Abstract: Memory devices and methods of forming memory devices are described. Methods of forming electronic devices are described where a spacer is formed around each of the bit line contact pillars, the spacer in contact with the spacer of an adjacent bit line contact pillar. A doped layer is then epitaxially grown on the memory stack and bit line is formed on the memory stack. The bit line is self-aligned with the active region.

Abstract: A slurry for chemical mechanical planarization includes a surfactant, and abrasive particles having an average diameter between 20 and 30 nm and an outer surface of ceria. The abrasive particles are formed using a hydrothermal synthesis process. The abrasive particles are between 0.1 and 3 wt % of the slurry.

Abstract: Embodiments described herein generally relate to devices and methods for magnetic-responsive chemical mechanical polishing. In one embodiment, a device including a support with one or more magnetic field generators formed therein is provided. The magnetic field generators can produce at least one magnetic field. A magnetic-responsive composite is positioned in magnetic connection with the magnetic field generators. When the magnetic-responsive composite receives the magnetic field from the magnetic field generators, the magnetic-responsive composite changes shape.