Patents by Inventor Abed Tatour

Abed Tatour has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10622317
    Abstract: Aspects of the disclosure provide an integrated circuit (IC) formed on a die. The IC includes first one or more electronic circuits and a seal ring structure. The first one or more electronic circuits are disposed on a first semiconductor substrate. The first semiconductor substrate is diced from a semiconductor wafer. The seal ring structure is configured to surround the first one or more electronic circuits. The seal ring structure is formed by patterning one or more layers of metal compounds on the semiconductor wafer using two or more circuit formation process steps. The seal ring structure includes a remaining portion of a complete seal ring structure after a dicing process step that cuts the complete seal ring structure. The complete seal ring structure has been formed on the semiconductor wafer to surround the first one or more electronic circuits and at least second one or more electronic circuits on a second semiconductor substrate that is diced from the semiconductor wafer.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: April 14, 2020
    Assignee: Marvell Israel (M.I.S.L.) Ltd.
    Inventors: Abed Tatour, Carol Pincu
  • Publication number: 20190206809
    Abstract: Aspects of the disclosure provide an integrated circuit (IC) formed on a die. The IC includes first one or more electronic circuits and a seal ring structure. The first one or more electronic circuits are disposed on a first semiconductor substrate. The first semiconductor substrate is diced from a semiconductor wafer. The seal ring structure is configured to surround the first one or more electronic circuits. The seal ring structure is formed by patterning one or more layers of metal compounds on the semiconductor wafer using two or more circuit formation process steps. The seal ring structure includes a remaining portion of a complete seal ring structure after a dicing process step that cuts the complete seal ring structure. The complete seal ring structure has been formed on the semiconductor wafer to surround the first one or more electronic circuits and at least second one or more electronic circuits on a second semiconductor substrate that is diced from the semiconductor wafer.
    Type: Application
    Filed: March 8, 2019
    Publication date: July 4, 2019
    Applicant: Marvell Israel (M.I.S.L) Ltd.
    Inventors: Abed Tatour, Carol Pincu
  • Patent number: 10229889
    Abstract: Aspects of the disclosure provide an integrated circuit (IC) formed on a die. The IC includes first one or more electronic circuits and a seal ring structure. The first one or more electronic circuits are disposed on a first semiconductor substrate. The first semiconductor substrate is diced from a semiconductor wafer. The seal ring structure is configured to surround the first one or, more electronic circuits. The seal ring structure is formed by patterning one or more layers of metal compounds on the semiconductor wafer using two or more circuit formation process steps. The seal ring structure includes a remaining portion of a complete seal ring structure after a dicing process step that cuts the complete seal ring structure. The complete seal ring structure has been formed on the semiconductor wafer to surround the first one or more electronic circuits and at least second one or more electronic circuits on a second semiconductor substrate that is diced from the semiconductor wafer.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: March 12, 2019
    Assignee: Marvell Israel (M.I.S.I.) Ltd.
    Inventors: Abed Tatour, Carol Pincu
  • Publication number: 20180122754
    Abstract: Aspects of the disclosure provide an integrated circuit (IC) formed on a die. The IC includes first one or more electronic circuits and a seal ring structure. The first one or more electronic circuits are disposed on a first semiconductor substrate. The first semiconductor substrate is diced from a semiconductor wafer. The seal ring structure is configured to surround the first one or, more electronic circuits. The seal ring structure is formed by patterning one or more layers of metal compounds on the semiconductor wafer using two or more circuit formation process steps. The seal ring structure includes a remaining portion of a complete seal ring structure after a dicing process step that cuts the complete seal ring structure. The complete seal ring structure has been formed on the semiconductor wafer to surround the first one or more electronic circuits and at least second one or more electronic circuits on a second semiconductor substrate that is diced from the semiconductor wafer.
    Type: Application
    Filed: November 2, 2017
    Publication date: May 3, 2018
    Applicant: Marvell Israel (M.I.S.L) Ltd.
    Inventors: Abed Tatour, Carlo Pincu