Abstract: A method for storage includes storing multiple memory pages in a memory of a first compute node. Using a second compute node that communicates with the first compute node over a communication network, duplicate memory pages are identified among the memory pages stored in the memory of the first compute node by directly accessing the memory of the first compute node. One or more of the identified duplicate memory pages are evicted from the first compute node. The identification of duplicate pages is performed by a node selected responsive to available processing or bandwidth resources.

Abstract: A method includes, in a computing system in which one or more workloads access memory pages in a memory, defining multiple memory-page lists, and specifying for each memory-page list a respective different scanning period. Access frequencies, with which the memory pages are accessed, are estimated continually by periodically checking the memory pages on each memory-page list in accordance with the scanning period specified for that memory-page list, and re-assigning the memory pages to the memory-page lists based on the estimated access frequencies. One or more of the memory pages are evicted from the memory based on a history of assignments of the memory pages to the memory-page lists.

Abstract: A method includes running multiple processing tasks on multiple physical processing cores that support general-purpose registers and special-purpose registers. Respective usage levels, with which the processing tasks use the special-purpose registers, are estimated. The physical processing cores are assigned to the processing tasks based on the estimated usage levels of the special-purpose registers.

Abstract: A method for storage includes storing multiple memory pages in a memory of a first compute node. Using a second compute node that communicates with the first compute node over a communication network, duplicate memory pages are identified among the memory pages stored in the memory of the first compute node by directly accessing the memory of the first compute node. One or more of the identified duplicate memory pages are evicted from the first compute node. The identification of duplicate pages is performed by a node selected responsive to available processing or bandwidth resources.

Abstract: A method includes, in a computing system in which one or more workloads access memory pages in a memory, defining multiple memory-page lists, and specifying for each memory-page list a respective different scanning period. Access frequencies, with which the memory pages are accessed, are estimated continually by periodically checking the memory pages on each memory-page list in accordance with the scanning period specified for that memory-page list, and re-assigning the memory pages to the memory-page lists based on the estimated access frequencies. One or more of the memory pages are evicted from the memory based on a history of assignments of the memory pages to the memory-page lists.

Abstract: A method includes running in a computer a hypervisor that allocates physical memory pages of the computer to a Virtual Machine (VM). A guest Operating System (OS), a virtual memory and a virtual storage device run in the VM. The guest OS maps the allocated physical memory pages to respective virtual memory pages, retains virtual memory pages that are frequently-accessed by the VM in the virtual memory, and swaps-out virtual memory pages that are rarely-accessed by the VM to the virtual storage. In the hypervisor, one or more of the physical memory pages allocated to the VM are selected, and the corresponding virtual memory pages preventing from being swapped-out by the guest OS, by marking the corresponding virtual memory pages in the guest OS as accessed thus causing the guest OS to regard the corresponding virtual memory pages as frequently-accessed.

Abstract: A method includes running in a computer a hypervisor that allocates physical memory pages of the computer to a Virtual Machine (VM). A guest Operating System (OS), a virtual memory and a virtual storage device run in the VM. The guest OS maps the allocated physical memory pages to respective virtual memory pages, retains virtual memory pages that are frequently-accessed by the VM in the virtual memory, and swaps-out virtual memory pages that are rarely-accessed by the VM to the virtual storage. In the hypervisor, one or more of the physical memory pages allocated to the VM are selected, and the corresponding virtual memory pages preventing from being swapped-out by the guest OS, by marking the corresponding virtual memory pages in the guest OS as accessed thus causing the guest OS to regard the corresponding virtual memory pages as frequently-accessed.

Abstract: A method includes, in a computing system that includes at least first and second compute nodes, running on the first compute node a workload that uses memory pages. The memory pages used by the workload are classified into at least active pages and inactive pages, and the inactive memory pages are evicted to shared storage that is accessible at least to the first and second compute nodes. In response to migration of the workload from the first compute node to the second compute node, the active pages are transferred from the first compute node to the second compute node for use by the migrated workload, and the migrated workload is provided with access to the inactive pages on the shared storage.

Abstract: Machines and methods for optimizing data storage among a plurality of data storage repositories are provided. The method comprises processing a data request submitted for storing data on one or more data storage mediums; determining whether duplicate copies of the data are to be maintained on more than one storage medium so that established quality of service requirements are met; and managing duplicate copies of the data on said one or more data storage mediums to meet the established quality of service requirements while servicing the data request.

Abstract: A computerized apparatus, a computer-implemented method and a computer program product for manipulating source code patches. The apparatus comprising a processor that is configured to: obtain a source code patch comprising plurality of source code modification instructions with respect to a source code and to automatically split the source code patch into plurality of sub-patches, wherein applying the plurality of sub-patches on the source code in an order is equivalent to applying the source code patch.

Abstract: A method for storage includes storing multiple memory pages in a memory of a first compute node. Using a second compute node that communicates with the first compute node over a communication network, duplicate memory pages are identified among the memory pages stored in the memory of the first compute node by directly accessing the memory of the first compute node. One or more of the identified duplicate memory pages are evicted from the first compute node.

Abstract: A method includes running multiple processing tasks on multiple physical processing cores that support general-purpose registers and special-purpose registers. Respective usage levels, with which the processing tasks use the special-purpose registers, are estimated. The physical processing cores are assigned to the processing tasks based on the estimated usage levels of the special-purpose registers.

Abstract: Apparatus, process and product useful for source code patches. The computerized apparatus having a processor, the apparatus comprising: a source code obtainer for obtaining a source code of a computer program; a patch instructions obtainer for obtaining a set of source code patches instructions, wherein a first patch instructions comprise a set of modification instructions to the source code associated with a first source code patch, wherein a second patch instructions comprise a set of modification instruction to the source code associated with a second source code patch; a source code editor configured to display to a user the source code and annotations associated with applying each source code patch simultaneously; and wherein said source code editor is further configured to edit the source code in accordance with user input, wherein based on user input the first and second source code patch instructions are modified.

Abstract: Machines, systems and methods for I/O monitoring in a plurality of compute nodes and a plurality of service nodes utilizing a Peripheral Component Interconnect express (PCIe) are provided. In one embodiment, the method comprises assigning at least one virtual function to a services node and a plurality of compute nodes by the PCIe interconnect and a multi-root I/O virtualization (MR-IOV) adapter. The MR-IOV adapter enables bridging of a plurality of compute node virtual functions with corresponding services node virtual functions. A front-end driver on the compute node requests the services node virtual function to send data and the data is transferred to the services node virtual function by the MR-IOV adapter. A back-end driver running in the services node receives and passes the data to a software service to modify/monitor the data. The back-end driver sends the data to another virtual function or an external entity.

Abstract: Machines, systems and methods for I/O monitoring in a plurality of compute nodes and a plurality of service nodes utilizing a Peripheral Component Interconnect express (PCIe) are provided. In one embodiment, the method comprises assigning at least one virtual function to a services node and a plurality of compute nodes by the PCIe interconnect and a multi-root I/O virtualization (MR-IOV) adapter. The MR-IOV adapter enables bridging of a plurality of compute node virtual functions with corresponding services node virtual functions. A front-end driver on the compute node requests the services node virtual function to send data and the data is transferred to the services node virtual function by the MR-IOV adapter. A back-end driver running in the services node receives and passes the data to a software service to modify/monitor the data. The back-end driver sends the data to another virtual function or an external entity.

Abstract: A memory management method in a virtualized computing environment is provided, in which a hypervisor implements at least a virtual machine (VM) over a host machine, wherein a guest operating system (OS) is executed over the VM and an application supporting memory management capabilities is executed over the guest OS. The method comprises invoking a first memory manager (java balloon) implemented by the application to deallocate memory allocated to the application for use by the hypervisor, in response to a request submitted by the hypervisor; and invoking a second memory manager (guest balloon) implemented over the guest operating system to deallocate memory allocated to the guest OS, in response to a request submitted by the hypervisor.

Abstract: A method for managing data transfer in a network environment, the method is provided. The method comprises receiving a request to transfer first data from a first source in a source domain comprising a plurality of sources to a first target in a target domain comprising a plurality of targets. If the first source is configured to transfer data in a first mode or if the first source is configured to transfer data in a second mode and the first data has previously been transferred to the target domain, a signature of the first data is transferred to the first target instead of the first data. If the first source is configured to operate in the second mode and the first data has not previously been transferred to the target domain, the first data is transferred to the first target.

Abstract: Systems and methods for enhancing the handling of interrupts in a virtual computing environment are disclosed. A CPU is configured such that the CPU, when in a virtual machine (VM) mode, directs an interrupt to a VM. When in the VM context, a guest in the VM is run with a hypervisor interrupt descriptor table (hypervisor IDT) to determine how the interrupt should be handled. The hypervisor IDT directs an interrupt that is to be handled by the VM to an interrupt handler in a guest IDT without causing a transition to the hypervisor. If an interrupt is to be handled by the hypervisor, the hypervisor IDT causes a transition to the hypervisor.

Abstract: Apparatus, process and product useful for source code patches. The computerized apparatus having a processor, the apparatus comprising: a source code obtainer for obtaining a source code of a computer program; a patch instructions obtainer for obtaining a set of source code patches instructions, wherein a first patch instructions comprise a set of modification instructions to the source code associated with a first source code patch, wherein a second patch instructions comprise a set of modification instruction to the source code associated with a second source code patch; a source code editor configured to display to a user the source code and annotations associated with applying each source code patch simultaneously; and wherein said source code editor is further configured to edit the source code in accordance with user input, wherein based on user input the first and second source code patch instructions are modified.

Abstract: A computerized apparatus, a computer-implemented method and a computer program product for manipulating source code patches. The apparatus comprising a processor that is configured to: obtain a source code patch comprising plurality of source code modification instructions with respect to a source code and to automatically split the source code patch into plurality of sub-patches, wherein applying the plurality of sub-patches on the source code in an order is equivalent to applying the source code patch.