Patents by Inventor Abhaya Asthana

Abhaya Asthana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11258659
    Abstract: A method for managing alarms in a network includes identifying a first set of alarms based on data in a knowledge base, determining at least one attribute for each alarm in the first set of alarms, generating a model based on the at least one attribute, and applying the model to manage alarms in the network. The at least one attribute includes at least one of a persistence time for one or more alarms in the first set of alarms, an alarm group derived from the first set of alarms, and predictions for alarms in the first set of alarms. The model may be adaptively updated to track changing network conditions relating to the alarms.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: February 22, 2022
    Assignee: Nokia Solutions and Networks Oy
    Inventors: Rashid Mijumbi, Abhaya Asthana, Carlos Bernal Paniagua, Manuel Castejon Cay
  • Patent number: 11228503
    Abstract: Systems, methods, apparatuses, and computer program products for the generation and adaptation of network baselines are provided. One method may include generating predicted values for one or more network metrics over a future time period, generating a baseline for the network metric(s) using the predicted values and/or historic data, evaluating the network metric(s) to detect changes in network conditions using at least one time series analysis technique, and adapting the baseline to the detected changes in network conditions using historic data, machine learning and/or a time series analysis technique.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: January 18, 2022
    Assignee: Nokia Solutions and Networks Oy
    Inventors: Rashid Mijumbi, Abhaya Asthana, Markku Koivunen, Haiyong Fu, Qinjun Zhu
  • Publication number: 20210168042
    Abstract: Systems, methods, apparatuses, and computer program products for the generation and adaptation of network baselines are provided. One method may include generating predicted values for one or more network metrics over a future time period, generating a baseline for the network metric(s) using the predicted values and/or historic data, evaluating the network metric(s) to detect changes in network conditions using at least one time series analysis technique, and adapting the baseline to the detected changes in network conditions using historic data, machine learning and/or a time series analysis technique.
    Type: Application
    Filed: December 8, 2017
    Publication date: June 3, 2021
    Inventors: Rashid MIJUMBI, Abhaya ASTHANA, Markku KOIVUNEN, Haiyong FU, Qinjun ZHU
  • Publication number: 20210014107
    Abstract: A method for managing alarms in a network includes identifying a first set of alarms based on data in a knowledge base, determining at least one attribute for each alarm in the first set of alarms, generating a model based on the at least one attribute, and applying the model to manage alarms in the network. The at least one attribute includes at least one of a persistence time for one or more alarms in the first set of alarms, an alarm group derived from the first set of alarms, and predictions for alarms in the first set of alarms. The model may be adaptively updated to track changing network conditions relating to the alarms.
    Type: Application
    Filed: July 12, 2019
    Publication date: January 14, 2021
    Inventors: Rashid MIJUMBI, Abhaya ASTHANA, Carlos Bernal PANIAGUA, Manuel CASTEJON CAY
  • Patent number: 9300548
    Abstract: A dynamic reliability and security capability is provided. The dynamic reliability and security capability may be configured to support use of a dynamic reliability profile (DRP) that specifies the reliability parameters of a customer both as function of time and as a function of the requirements of the application or service of the customer. The reliability parameters may specify reliability requirements and/or goals of the customer, thereby providing a time varying requirements/goals profile. The dynamic reliability and security capability may be configured to dynamically configure the cloud resources to provide the required reliability as specified by the DRP. The RSG capability may be configured to subsequently monitor and meter the behavior to assure that the specified reliability is in fact being delivered, which may include use of self-healing capabilities to provide service assurance.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: March 29, 2016
    Assignee: Alcatel Lucent
    Inventors: Abhaya Asthana, Marc S. Benowitz, Uma Chandrashekhar
  • Patent number: 8774790
    Abstract: The invention includes a method and apparatus for reconfiguring a first base station element to attempt to serve at least a portion of the plurality of wireless terminals served by a second base station element in response to detection of a failure condition at a second base station element that was serving the plurality of wireless terminals prior to the occurrence of the failure condition.
    Type: Grant
    Filed: February 15, 2006
    Date of Patent: July 8, 2014
    Assignee: Alcatel Lucent
    Inventors: Abhaya Asthana, Eric Bauer, Peter Bosch, Xuemei Zhang
  • Publication number: 20130097304
    Abstract: A dynamic reliability and security capability is provided. The dynamic reliability and security capability may be configured to support use of a dynamic reliability profile (DRP) that specifies the reliability parameters of a customer both as function of time and as a function of the requirements of the application or service of the customer. The reliability parameters may specify reliability requirements and/or goals of the customer, thereby providing a time varying requirements/goals profile. The dynamic reliability and security capability may be configured to dynamically configure the cloud resources to provide the required reliability as specified by the DRP. The RSG capability may be configured to subsequently monitor and meter the behavior to assure that the specified reliability is in fact being delivered, which may include use of self-healing capabilities to provide service assurance.
    Type: Application
    Filed: October 14, 2011
    Publication date: April 18, 2013
    Inventors: Abhaya ASTHANA, Marc S. Benowitz, Uma Chandrashekhar
  • Publication number: 20070226546
    Abstract: The invention includes a method for determining a software reliability metric, including obtaining testing defect data, obtaining test case data, determining testing exposure time data using the test case data, and computing the software reliability metric using testing defect data and testing exposure time data. The defect data includes software defect records. The test case data includes test case execution time data. A testing results profile is determined using testing defect data and testing exposure time data. A software reliability model is selected according to the testing results profile. A testing defect rate and a number of residual defects are determined by using the software reliability model and the testing results profile. A testing software failure rate is determined using the testing defect rate and the number of residual defects. A field software availability metric is determined using the field software failure rate determined using the testing software failure rate.
    Type: Application
    Filed: December 22, 2005
    Publication date: September 27, 2007
    Inventors: Abhaya Asthana, Eric Bauer, Xuemei Zhang
  • Publication number: 20070190996
    Abstract: The invention includes a method and apparatus for reconfiguring a first base station element to attempt to serve at least a portion of the plurality of wireless terminals served by a second base station element in response to detection of a failure condition at a second base station element that was serving the plurality of wireless terminals prior to the occurrence of the failure condition.
    Type: Application
    Filed: February 15, 2006
    Publication date: August 16, 2007
    Inventors: Abhaya Asthana, Eric Bauer, Peter Bosch, Xuemei Zhang
  • Patent number: 6029224
    Abstract: An apparatus is provided that improves memory storage and access speed by repackaging various types of memories, SRAM, DRAM, and Disk, into a single storage unit. Each unit contains a slice of all the various memories along with programmable logic to control the accessing of the memories. This unit appears to the central processing unit (CPU) of a computer system as an extremely large secondary cache. Independent management of each unit greatly reduces bus traffic to implement any particular address space. By using a plurality of these memory units, an extremely large amount of memory can be accessed by the CPU with the speed of accessing a cache system.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: February 22, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Abhaya Asthana, Douglas E. Haggan, King Lien Tai
  • Patent number: 5740384
    Abstract: A multimedia system includes a plurality of components. Each component has a set of hardware resources which are used to perform basic functions. Each component further contains knowledge regarding the properties, limitations and behavior of the resources. A backplane receives each of the components. The backplane includes a plurality of programmable interfaces. Each interface interfaces with a different component. A control thread is associated with each component which manages the resources contained in the component. The combination of the backplane, control thread and component form a basic service which operates independently from other basic services created by the system.
    Type: Grant
    Filed: February 16, 1996
    Date of Patent: April 14, 1998
    Assignee: Lucent Technologies Inc.
    Inventors: Abhaya Asthana, Venkatesh Krishnaswamy
  • Patent number: 5590370
    Abstract: A memory system contains one or more active storage elements. Each active storage element includes a memory element and a processing element associated with the memory element. The memory element contains microcode for implementing a specific function. A first bus connects the processing element to a host processor. A second bus connects the processing element to a peripheral.
    Type: Grant
    Filed: November 16, 1995
    Date of Patent: December 31, 1996
    Assignee: Lucent Technologies Inc.
    Inventors: Abhaya Asthana, Mark R. Cravatts, Paul Krzyzanowski
  • Patent number: 5134711
    Abstract: A programmable memory system that interfaces with a computer's control and data manipulation units, and is capable of performing the manipulation, bookkeeping, and checking that would normally be performed by the computer. The memory system comprises active structure modules that are interconnected in a network to form clusters. The clusters are interconnected to form an aggregate memory system. Each ASE contains a processor section and a conventional memory section.
    Type: Grant
    Filed: May 13, 1988
    Date of Patent: July 28, 1992
    Assignee: AT&T Bell Laboratories
    Inventors: Abhaya Asthana, Jonathan A. Chandross, Hosagrahar V. Jagadish, Scott C. Knauer, Daniel Lin
  • Patent number: 4061904
    Abstract: A variable analog function generator which is independent of an external computer during the time that it generates at least one predetermined output function of at least one input variable. The output function is expressed in terms of hybrid variables each having an analog portion and a digital portion. The function generator has a first dedicated memory which is loaded during set up time with data related to breakpoints defining the input variable. A second dedicated memory is loaded during set up time with tables of values defining the digital portion. During function generation, the analog portions are generated in response to (1) the input variable and (2) the data related to the breakpoints which is accessed in parallel from the first dedicated memory. The output function is generated in response to (1) the analog portions and (2) the tables of values accessed from the second dedicated memory.
    Type: Grant
    Filed: March 3, 1976
    Date of Patent: December 6, 1977
    Assignee: Electronic Associates, Inc.
    Inventors: George Hannauer, Abhaya Asthana
  • Patent number: 4057711
    Abstract: An analog switching system having fan-out for switching a plurality of inputs coupled to analog signal sources with respect to a plurality of outputs coupled to analog signal destinations. A three stage switch matrix includes input, middle and output switch blocks with each block having a plurality of analog switch means and latching means. Any one input terminal of a switch block may be connected to any one or more of the output terminals of that block. A matrix controller coupled to each of the switch blocks addresses each switch block and actuates at least one of the latching means to provide a connection assignment for at least one of the analog switching means.
    Type: Grant
    Filed: March 17, 1976
    Date of Patent: November 8, 1977
    Assignee: Electronic Associates, Inc.
    Inventors: Abhaya Asthana, George Hannauer