Patents by Inventor Abhijeet Bhalerao

Abhijeet Bhalerao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ADAPTIVE EPWR (ENHANCED POST WRITE READ) SCHEDULING
    Publication number: 20150100851
    Abstract: A system and method for adaptive enhanced post write reads (EPWRs) is provided. An error rate of a block of solid state memory may be determined. Foldings may be performed more times between two consecutive enhanced post write reads on the block when the determined error rate of the block is a lower value than when the determined error rate is a higher value. The foldings may be performed by folding data into the block of the solid state memory.
    Type: Application
    Filed: October 3, 2013
    Publication date: April 9, 2015
    Inventors: Abhijeet Bhalerao, Mrinal Kochar, Piyush Sagdeo
  • Memory System Performance Configuration
    Publication number: 20150052289
    Abstract: A nonvolatile memory die is tested to determine certain parameters such as read time, which are then recorded in the nonvolatile memory die. After the die is incorporated into a memory system, and firmware is downloaded, the nonvolatile memory system uses the recorded parameters to determine how to configure the memory system for operation within specified limits, such as determining how much delay to apply to read operations.
    Type: Application
    Filed: August 19, 2013
    Publication date: February 19, 2015
    Applicant: SanDisk Technologies, Inc.
    Inventors: Preeti Yadav, Barys Sarana, Abhijeet Bhalerao, Frederick Fernandez, Namita Joshi