Patents by Inventor Abhijit A. Patki

Abhijit A. Patki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9184761
    Abstract: A method, comprising: selecting three Two-Tuples before and three after a selected synchronous ADC conversion point; calculating the coefficients of a third order polynomial based on the value of the previous time asynchronous sample, the time difference between the asynchronous samples surrounding the selected sample, and the five linear slopes of the line segments between the three points before and the points after the selected synchronous sample point, including the slope of the selected point; evaluating the third order polynomial at the synchronous time instant; generating the synchronous ADC value based on this calculation; and using the ADC value as the desired voltage level of the synchronous sample, wherein the synchronous ADC value is generated based on this calculation.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: November 10, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Abhijit A. Patki, Ganesan Thiagarajan, Udayan Dasgupta
  • Patent number: 9100035
    Abstract: A snapout calculator, and wherein the snapout calculator determines where the reference levels for the various comparators shall be placed after each asynchronous sample is generated.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: August 4, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Udayan Dasgupta, Abhijit A. Patki, Ganesan Thiagarajan, Janakiraman S, Madhulatha Bonu, Venugopal Gopinathan
  • Patent number: 9077359
    Abstract: A method, comprising: selecting two Two-Tuples before and two after a selected synchronous ADC conversion point; calculating the coefficients of a third order polynomial based on the value of the previous time asynchronous sample, the time differences between each of the asynchronous samples surrounding the selected sample, and the three linear slopes of the line segments between the two points before and the points after the selected synchronous sample point, including the slope of the selected point; evaluating the third order polynomial at the synchronous time instant; generating the synchronous ADC value based on this calculation; and using the ADC value as the desired voltage level of the synchronous sample, wherein the synchronous ADC value is generated based on this calculation.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: July 7, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ganesan Thiagarajan, Udayan Dasgupta, Abhijit A. Patki
  • Patent number: 8988266
    Abstract: A method, comprising: receiving an analog input; determining an upper outer rail and a lower outer rail as polling values to be used by voltage comparators; blanking at least three comparators; determining which two of the at least three comparators are closest to the input analog voltage levels; defining the two comparators which are closest to the analog input signal to be the next comparators of the next sampling process; assigning a remaining comparator at a voltage level in between the new top and bottom voltage levels; enabling the outer rails, but blanking the inner rail; progressively narrowing down the voltage range spanned by the two outer comparators; and generating a 2-tuple value of an asynchronous voltage comparator crossing.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: March 24, 2015
    Assignee: Texas Instruments Incorporated
    Inventors: Janakiraman S, Udayan Dasgupta, Ganesan Thiagarajan, Abhijit A. Patki, Madhulatha Bonu, Venugopal Gopinathan
  • Patent number: 8981984
    Abstract: A method, comprising: receiving a plurality of 2-tuples of asynchronously sampled inputs at an asynchronous to synchronous reconstructor; performing a coarse asynchronous to synchronous conversion using the plurality of 2-tuples to generate a plurality of low precision synchronous outputs; generating a high precision synchronous output, z0, using a plurality of asynchronous 2-tuples, low precision synchronous outputs after it, and its own high precision outputs from previous steps; calculating c0 and c?1 by summing future low precision outputs and the past high precision outputs after they are weighted with the appropriate windowed sinc. values and then subtracted from appropriate asynchronous samples; calculating, the four quantities “s?11”, “s01”, “s00” and “s?10” based on particular values of the windowed sinc. function; and using c0, c?1, s?11, s01, s00 and s?10, the high precision synchronous output of interest, z0 is generated.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: March 17, 2015
    Assignee: Texas Instruments Incorporated
    Inventors: Udayan Dasgupta, Ganesan Thiagarajan, Abhijit A. Patki
  • Publication number: 20140247176
    Abstract: An apparatus, comprising: an analog to digital converter including: a clipping detector; and a post-processor, wherein the post processor generates synchronous values of clipped data based on non-clipped values of non-clipped data.
    Type: Application
    Filed: February 28, 2014
    Publication date: September 4, 2014
    Inventors: Janakiraman S, Udayan Dasgupta, Ganesan Thiagarajan, Abhijit A. Patki, Madhulatha Bonu, Venugopal Gopinathan
  • Publication number: 20140247173
    Abstract: A method, comprising: selecting three Two-Tuples before and three after a selected synchronous ADC conversion point; calculating the coefficients of a third order polynomial based on the value of the previous time asynchronous sample, the time difference between the asynchronous samples surrounding the selected sample, and the five linear slopes of the line segments between the three points before and the points after the selected synchronous sample point, including the slope of the selected point; evaluating the third order polynomial at the synchronous time instant; generating the synchronous ADC value based on this calculation; and using the ADC value as the desired voltage level of the synchronous sample, wherein the synchronous ADC value is generated based on this calculation.
    Type: Application
    Filed: February 28, 2014
    Publication date: September 4, 2014
    Inventors: Abhijit A. Patki, Ganesan Thiagarajan, Udayan Dasgupta
  • Publication number: 20140247171
    Abstract: A method, comprising: receiving an analog input; determining an upper outer rail and a lower outer rail as polling values to be used by voltage comparators; blanking at least three comparators; determining which two of the at least three comparators are closest to the input analog voltage levels; defining the two comparators which are closest to the analog input signal to be the next comparators of the next sampling process; assigning a remaining comparator at a voltage level in between the new top and bottom voltage levels; enabling the outer rails, but blanking the inner rail; progressively narrowing down the voltage range spanned by the two outer comparators; and generating a 2-tuple value of an asynchronous voltage comparator crossing.
    Type: Application
    Filed: February 28, 2014
    Publication date: September 4, 2014
    Inventors: Janakiraman S., Udayan Dasgupta, Ganesan Thiagarajan, Abhijit A. Patki, Madhulatha Bonu, Venugopal Gopinathan
  • Publication number: 20140247172
    Abstract: A snapout calculator, and wherein the snapout calculator determines where the reference levels for the various comparators shall be placed after each asynchronous sample is generated.
    Type: Application
    Filed: February 28, 2014
    Publication date: September 4, 2014
    Inventors: Udayan Dasgupta, Abhijit A. Patki, Ganesan Thiagarajan
  • Publication number: 20140247175
    Abstract: A method, comprising: receiving a plurality of 2-tuples of asynchronously sampled inputs at an asynchronous to synchronous reconstructor; performing a coarse asynchronous to synchronous conversion using the plurality of 2-tuples to generate a plurality of low precision synchronous outputs; generating a high precision synchronous output, z0, using a plurality of asynchronous 2-tuples, low precision synchronous outputs after it, and its own high precision outputs from previous steps; calculating c0 and c?1 by summing future low precision outputs and the past high precision outputs after they are weighted with the appropriate windowed sinc. values and then subtracted from appropriate asynchronous samples; calculating, the four quantities “s?11”, “s01”, “s00” and “s?10” based on particular values of the windowed sinc. function; and using c0, c?1, s?11, s01, s00 and s?10, the high precision synchronous output of interest, z0 is generated.
    Type: Application
    Filed: February 28, 2014
    Publication date: September 4, 2014
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Udayan Dasgupta, Janakiraman S, Ganesan Thiagarajan, Abhijit A. Patki, Madhulatha Bonu, Venugopal Gopinathan