Abstract: The present disclosure is directed to a single phase acetylated castor component (SP-ACC). An acetylated castor component is purified to produce the SP-ACC which contains a reduced amount of, or no, insoluble component(s) therein. The SP-ACC enhances the performance and properties of plasticizers of which it is a component.

Abstract: A method for managing a shared buffer between a data processing system and a network. The method provides a communication interface unit for managing bandwidth of data between the data processing system and an external communicating interface connecting to the network. The method performs, by the communication interface unit, a combined de-queue and head drop operation on at least one data packet queue within a predefined number of clock cycles. The method also performs, by the communication interface unit, an en-queue operation on the at least one data packet queue in parallel with the combined de-queue operation and head drop operation within the predefined number of clock cycles.

Abstract: The disclosure is directed to a plasticizer system with improved electrical properties. The plasticizer system includes (a) a primary plasticizer consisting of an epoxidized vegetable oil and (b) a secondary plasticizer consisting of an epoxidized fatty acid ester, where the primary plasticizer is present in an amount greater than 50% by weight of the total plasticizer system weight.

Abstract: A method for managing a shared buffer between a data processing system and a network. The method provides a communication interface unit for managing bandwidth of data between the data processing system and an external communicating interface connecting to the network. The method performs, by the communication interface unit, a combined de-queue and head drop operation on at least one data packet queue within a predefined number of clock cycles. The method also performs, by the communication interface unit, an en-queue operation on the at least one data packet queue in parallel with the combined de-queue operation and head drop operation within the predefined number of clock cycles.

Abstract: The present invention is directed at a binder for a battery electrode comprising an ethylene oxide-containing copolymer including a first monomer of ethylene oxide (EO) and at least one additional monomer selected from an alkylene-oxide that is different from the first monomer of EO, an alkyl glycidyl ether, or a combination thereof; wherein the ethylene oxide-containing copolymer has a weight average molecular weight less than about 200,000 g/mole (e.g., from about 10,000 to about 100,000), the molar fraction of the first monomer of EO (XEo) in the ethylene oxide-containing copolymer is greater than 0.80 (e.g., from about 0.80 to about 0.995), and the ethylene oxide-containing copolymer h a peak melting temperature (Tp), in ° C., for a selected XEO in the range of about 0.80 to about 0.995, which is below a maximum value of Tpmax, at the selected XEO, which is calculated using the equation Tpmax=(60?150 (1?XEO)).

Abstract: Systems and methods consistent with the present invention provide a mechanism that can efficiently manage multiple queues and maintain fairness among ports while not placing additional performance demands on the memory used to store the queue data structures. Within a port, high priority traffic is dropped only if it is consuming more than its fair share of bandwidth allocated to that port. Queue arbitration is of low performance cost and simple because it arbitrates only across queues per port, rather than across all the queues in parallel. Accordingly, fair arbitration with relatively little hardware cost.

Abstract: Systems and methods consistent with the present invention provide a mechanism that can efficiently manage multiple queues and maintain fairness among ports while not placing additional performance demands on the memory used to store the queue data structures. Within a port, high priority traffic is dropped only if it is consuming more than its fair share of bandwidth allocated to that port. Queue arbitration is of low performance cost and simple because it arbitrates only across queues per port, rather than across all the queues in parallel. Accordingly, fair arbitration with relatively little hardware cost.

Abstract: A source processing node communicates with a destination processing node though a channel that has bandwidth requirements and is uni-directional. The source processing node generates the channel to the destination processing node. The destination processing node then accepts the channel. The source processing node allocates a transmit buffer for the channel. The destination processing node also allocates a receive buffer for the channel. A source processing element writes data to the transmit buffer for the channel. A source network interface transmits the data from the transmit buffer of the source processing node over the channel. A destination network interface receives the data into the receive buffer for the channel. A destination processing element receives the data from the receive buffer.

Abstract: The present disclosure is directed to a single phase acetylated castor component (SP-ACC). An acetylated castor component is purified to produce the SP-ACC which contains a reduced amount of, or no, insoluble component(s) therein. The SP-ACC enhances the performance and properties of plasticizers of which it is a component.

Abstract: A catalyst composition for polymerizing oxiranes is provided that yields high molecular weight poly(oxiranes). The catalyst composition comprises: a hydrophobically modified particulate inorganic oxide; an aluminum alkyl complex; and a compound containing a Lewis basic free electron pair. Polymerization methods and poly(oxirane) polymers are also provided.

Abstract: Ethylene-vinylsilane copolymers are moisture-cured under ambient conditions using a synergistic combination of at least one Lewis acid and at least one Brønsted acid or at least one Lewis base and at least one Brønsted base. Preferably the catalyst system comprises a Lewis acid, e.g., dibutyltin dilaurate, in combination with a Brønsted acid, e.g., sulfonic acid. The Lewis acid or base and the Brønsted acid or base is present in the catalyst system at a molar ratio of Lewis acid/base to Brønsted acid/base of 1:10 to 10:1.

Abstract: A novel CaCO.sub.3 sorbent with its physical properties tailored for high SO.sub.2 removal is produced in accordance with the present invention. The surface area, porosity and the distribution of pore sizes of the sorbent have been designed and controlled to give rise to the optimum internal structure necessary for high SO.sub.2 removal. The CaCO.sub.3 sorbent possesses 60 m.sup.2 /g surface area and 0.18 cc/g pore volume and exhibits extraordinary reactivity towards SO.sub.2 (70% utilization in 530 milliseconds at 1080.degree. C. and 3900 ppm SO.sub.2 concentration) when compared with other carbonate and hydrate sorbents in our laboratory reactor system. The sorbent may be produced by precipitation in a slurry bubble column reactor system and preferably contains about 2% by weight of a surfactant which is added during its preparation and improves the properties of CaCO.sub.3 in the course of precipitation. The high utilization of this tailored CaCO.sub.

Abstract: A switch for digital communication networks includes a queuing system cape of implementing a broad class of scheduling algorithms for many different applications and purposes, with the queuing system including both a tag-based primary queue which contain ATM cells organized by priority and a secondary queue which contains ATM cells which are not yet scheduled for transmission and which are organized by virtual channel. A queuing decision module is provided to determine in which queue an incoming ATM cell should be deposited. A requeuing module operates when an event occurs that unblocks a particular virtual channel. The requeuing module, on occurrence of such an event, accesses the secondary queue to obtain another cell, to assign it priority and to move it to the primary queue. The queuing decision module, along with a virtual channel table, can be used easily to block virtual channels when necessary. The combination of queues also allows for round robin scheduling.

Abstract: The speed of a hardware-software debugger is markedly increased through the use of high speed simulators which ignore all systems operations except those where design errors are expected to manifest themselves, by skipping CPU bus cycles of no interest for the simulation, by not explicitly simulating periodic clock signals and generating only schedules of clock signals, and by caching instructions when alien computers are used in the simulation process to eliminate decoding of the instructions of the target computer.

Abstract: A switch for digital communication networks includes a queuing system capable of implementing a broad class of scheduling algorithms for many different applications and purposes, with the queueing system including means for providing numerical tags to incoming cells or packets, the values of the tags being calculated when incoming cells or packets arrive at the switch. A queue and search module is provided to select cells or packets for transmission based on these tags. The combination of the tags and the queue and search module enables simple and fast implementations of a wide variety of scheduling algorithms, including algorithms for supporting communication traffic with real time requirements, continuous media such as audio and video, and traffic requiring very fast response. Furthermore, multiple classes of traffic are supported in a single network switch, each class having its own scheduling algorithm and policy.