Abstract: A method includes receiving a request for an allocation of memory resources based on quality of service (QoS) parameters. The method further includes provisioning, via a QoS manager component, a plurality of physical functions to provide the requested allocation of resources. At least two of the plurality of physical functions can be provided to meet a QoS criteria.

Abstract: An example apparatus includes: digitally locked loop (DLL) circuitry coupled to a clock terminal and configured to generate a plurality of delayed clocks at a plurality of delayed clock terminals based on a reference clock of the clock terminal; first retimer circuitry coupled to the plurality of delayed clock terminals, a first data terminal, and a second data terminal, the first retimer circuitry configured to delay and serialize data of the first data terminal and the second data terminal using at least one of the delayed clocks of the plurality of delayed clock terminals; and second retimer circuitry coupled to the plurality of delayed clock terminals, a third data terminal, and a fourth data terminal, the second retimer circuitry configured to delay and serialize data of the third data terminal and the fourth data terminal.

Abstract: This disclosure provides systems, methods and apparatuses for selectively using spatial reuse (SR) transmissions in the presence of an overlapping basic service set (OBSS) transmission. In some implementations, a wireless communication device may transmit data to another wireless communication device using SR packets in the presence of an OBSS transmission or interference only when the signal strength of SR packets received at the other wireless communication device is greater than an amount of signal degradation of the OBSS transmission caused by the SR transmission.

Abstract: Methods and systems are provided for autonomously operating a retractable lighting arrangement. One method involves obtaining a current speed of the vehicle when the lighting arrangement is in an extended state, and when the current speed is greater than a threshold when the lighting arrangement is in the extended state, verifying one or more illumination elements associated with the lighting arrangement are in a deactivated state and thereafter automatically signaling an actuation arrangement associated with the lighting arrangement to transition the lighting arrangement from the extended state to a retracted state.

Abstract: A glitch filter system includes an input stage to receive an input signal, a first output to provide a first digital signal, and a second output to provide a second digital signal. A C-element of such system receives the first digital signal and the second digital signal and provides a third digital signal at a first logic state in response to each of the first and second digital signals having a second logic state opposite the first logic state. An output latch of such system provides an output signal at the second logic state in response to the first logic state of the third digital. The output latch also receives the first and second digital signals to maintain the first logic state of the third digital signal in response to one of the first and second digital signals changing from the second logic state to the first logic state.

Abstract: The exemplary embodiments provide real-time data capture and processing which improves data processing performance and speed and facilitate passing of the processed data to various analytical sources, while maintaining superior data quality checks, particularly with respect to data elements associated with multiple data types. The proposed system and process can be used to continuously consume and listen to multiple events while mapping the events to appropriate schemas provided in a separate schema stream. The schema stream is provided once and cached to minimize bandwidth consumed by the transaction stream. The schema information is then further enriched with information from a metadata registry. The event data may then be compressed and aligned in memory tables based on the enriched schema. Once events are decoded and sorted into memory tables in accordance to the identified schema, each memory table can be processed in parallel.

Abstract: In accordance with an embodiment, described herein is a system and method for supporting multi-tenancy in an application server, cloud, on-premise, or other environment, which enables categories of components and configurations to be associated with particular application instances or partitions. Resource group templates define, at a domain level, collections of deployable resources that can be referenced from resource groups. Each resource group is a named, fully-qualified collection of deployable resources that can reference a resource group template. A partition provides an administrative and runtime subdivision of the domain, and contains one or more resource groups. Each resource group can reference a resource group template, to bind deployable resources to partition-specific values, for use by the referencing partition. A tenant of the application server or cloud environment can be associated with a partition, or applications deployed therein, for use by that tenant.

Abstract: Methods and systems are provided for slewing a light beam axis directly between points on the ground. One method involves determining a first position associated with a beam axis of a lighting arrangement in a Cartesian reference frame based on an initial orientation of the lighting arrangement in a spherical reference frame, determining an adjustment for the lighting arrangement in the Cartesian reference frame in response to a user input, determining an updated position for the beam axis in the Cartesian reference frame based on the first position and the adjustment in the Cartesian reference frame, transforming the updated position for the beam axis in the Cartesian reference frame to an updated orientation of the lighting arrangement in the spherical reference frame, and concurrently commanding actuators associated with the lighting arrangement to slew the lighting arrangement from the initial orientation to the updated orientation in the spherical reference frame.

Abstract: A computerized-method for calculating an agent skill-satisfaction-index and utilization thereof, is provided herein. The computerized-method includes operating an Agent-Skill-Satisfaction-Index (ASSI)-scoring module.

Abstract: A method for controlling an orientation of a searchlight on a vehicle is provided. The method comprises: obtaining a target range to a point of interest (POI) at a target; determining a searchlight position and attitude; calculating a three dimensional position at the POI using searchlight azimuth and tilt actuator angles, the target range, and the searchlight position and attitude, while a searchlight light head continues to point at the 3D target position despite changes in movement or orientation of the vehicle; calculating a desired searchlight orientation including azimuth angle and tilt angle to point the light head at the target through inverting a kinematic relationship between the vehicle and the searchlight; calculating compensatory actuator angles for a plurality of searchlight actuators to achieve the desired searchlight orientation based on error measurements calculated from a current orientation; and commanding the plurality of searchlight actuators to the compensatory actuator angles.

Abstract: A computerized-method for calculating an agent skill-satisfaction-index and utilization thereof, is provided herein. The computerized-method includes operating an Agent-Skill-Satisfaction-Index (ASSI)-scoring module.

Abstract: In accordance with an embodiment, described herein is a system and method for supporting multi-tenancy in an application server, cloud, on-premise, or other environment, which enables categories of components and configurations to be associated with particular application instances or partitions. Resource group templates define, at a domain level, collections of deployable resources that can be referenced from resource groups. Each resource group is a named, fully-qualified collection of deployable resources that can reference a resource group template. A partition provides an administrative and runtime subdivision of the domain, and contains one or more resource groups. Each resource group can reference a resource group template, to bind deployable resources to partition-specific values, for use by the referencing partition. A tenant of the application server or cloud environment can be associated with a partition, or applications deployed therein, for use by that tenant.

Abstract: Techniques for combining the functionality of fabric interconnects and switches (e.g., Top-of-Rack (ToR) switches) into one network entity, thereby reducing the number of devices in a fabric and complexity of communications in the fabric. By collapsing FI and ToR switch functionality into one network entity, server traffic may be directly forwarded by the ToR switch and an entire tier is now eliminated from the topology hierarchy which may improve the control, data, and management plane. Further, this disclosure describes techniques for dynamically managing the number of gateway proxies running on one or more computer clusters based on a number of managed switch domains.

Abstract: The embodiments herein disclose methods and systems for switching between a macro and a non-macro sensing mode for capturing macro and non-macro media in real-time. A method for controlling an electronic device may include acquiring at least one frame; identifying an operation mode of the electronic device among a macro sensing mode and non-macro sensing mode based on at least one of focus data and blur data of the at least one frame; and acquiring at least one image by using an image sensor, from among a plurality of image sensors of the electronic device, corresponding to the operation mode.

Abstract: In some examples, a switch comprises first and second drain-extended transistors of a first type, third and fourth drain-extended transistors of a second type, a switch input coupled between drains of the first and third drain-extended transistors, a switch output coupled between drains of the second and fourth drain-extended transistors, and a control input. The control input is coupled to gates of the first and second drain-extended transistors, a first switch coupled to sources of the first and second drain-extended transistors, a second switch coupled between a voltage supply and gates of the third and fourth drain-extended transistors, and a third switch coupled between the voltage supply and sources of the third and fourth drain-extended transistors. The control input comprises a fifth drain-extended transistor coupled between the sources of the third and fourth drain-extended transistors and the gates of the third and fourth drain-extended transistors.

Abstract: An analog-to-digital converter (ADC) is provided. In some examples, the ADC includes a first reference voltage supply input, a second reference voltage supply input, a comparator comprising an input node, and a first reference switch coupled between the second reference voltage supply input and the input node of the comparator. The ADC also includes a set of capacitors, where each capacitor of the set of capacitors comprises a first terminal. In addition, the ADC includes a second reference switch coupled between the first reference voltage supply input and the first terminal of each capacitor of the set of capacitors. The ADC further includes a third switch coupled between the input node of the comparator and the first terminal of each capacitor of the set of capacitors.

Abstract: Examples of this description provide for a circuit. In some examples, the circuit includes a resistive network, a least significant bit (LSB) capacitor selectively coupled via a switch to receive an analog input voltage or to a selected first tap in the resistive network, and a charge boost network coupled in parallel with the resistive network and to a midpoint of the resistive network. To determine a most significant bit of lower order bits of a digital representation of the analog input voltage, the charge boost network is coupled to the LSB capacitor.

Abstract: In some examples, a switch comprises first and second drain-extended transistors of a first type, third and fourth drain-extended transistors of a second type, a switch input coupled between drains of the first and third drain-extended transistors, a switch output coupled between drains of the second and fourth drain-extended transistors, and a control input. The control input is coupled to gates of the first and second drain-extended transistors, a first switch coupled to sources of the first and second drain-extended transistors, a second switch coupled between a voltage supply and gates of the third and fourth drain-extended transistors, and a third switch coupled between the voltage supply and sources of the third and fourth drain-extended transistors. The control input comprises a fifth drain-extended transistor coupled between the sources of the third and fourth drain-extended transistors and the gates of the third and fourth drain-extended transistors.

Abstract: An analog-to-digital converter (ADC) is provided. In some examples, the ADC includes a first reference voltage supply input, a second reference voltage supply input, a comparator comprising an input node, and a first reference switch coupled between the second reference voltage supply input and the input node of the comparator. The ADC also includes a set of capacitors, where each capacitor of the set of capacitors comprises a first terminal. In addition, the ADC includes a second reference switch coupled between the first reference voltage supply input and the first terminal of each capacitor of the set of capacitors. The ADC further includes a third switch coupled between the input node of the comparator and the first terminal of each capacitor of the set of capacitors.

Abstract: A device includes a first transistor (M1) having a control terminal that is a first comparator input, a first terminal that can be coupled to a voltage source, and a second terminal that provides a first comparator output; a second transistor (M2) having a control terminal that is a second comparator input, a first terminal that can be coupled to the voltage source, and a second terminal that provides a second comparator output; a third transistor (M3) having a control terminal coupled to M1, and a first terminal coupled to ground; a fourth transistor (M4) having a control terminal coupled to M2, and a first terminal coupled to ground; first switches that couple M3 second terminal to M3 control terminal, and M4 second terminal to M4 control terminal; and second switches that couple M3 second terminal to the M2 second terminal, and M4 second terminal to the M1 second terminal.