Abstract: The present disclosure relates to systems, methods, and computer-readable media for virtualizing storage resources on non-volatile memory in a way that enables virtual machines on a computing device to efficiently access computing resources across multiple partitions of multiple non-volatile memory devices. For example, systems disclosed herein facilitate establishing a binding (e.g., a physical function, such as a single root input/output virtualization (SR-IOV) or a multi-physical function (MPF)) between the virtual machine(s) and solid state drive (SSD) devices. The systems disclosed herein further involve using a virtual volume manager on an operating system of the virtual machine(s) to implement features and functionality of the virtual machine(s) in accordance with configuration data unique to the virtual machine(s).

Abstract: The present disclosure relates to systems, methods, and computer-readable media for virtualizing storage resources on non-volatile memory in a way that enables virtual machines on a computing device to efficiently access computing resources across multiple partitions of multiple non-volatile memory devices. For example, systems disclosed herein facilitate establishing a binding (e.g., a physical function, such as a single root input/output virtualization (SR-IOV) or a multi-physical function (MPF)) between the virtual machine(s) and solid state drive (SSD) devices. The systems disclosed herein further involve using a virtual volume manager on an operating system of the virtual machine(s) to implement features and functionality of the virtual machine(s) in accordance with configuration data unique to the virtual machine(s).

Abstract: In non-limiting examples of the present disclosure, systems, methods and devices for partitioning dies based on spare blocks and workload expectations are provided. Data from non-volatile storage media may be received. The data may comprise information identifying each of a plurality of dies included in the non-volatile storage media and a number of blocks included in each of the plurality of dies. A number of spare blocks included in each of the plurality of dies may be determined. First and second sets of the plurality of dies may be identified, wherein the first set has a higher number of spare blocks than the second set. A first workload may be assigned to the first set of dies, the first workload being classified as write-intensive. A second workload may be assigned to the second set of dies, the second workload being classified as read-intensive.

Abstract: In non-limiting examples of the present disclosure, systems, methods and devices for partitioning dies based on spare blocks and workload expectations are provided. Data from non-volatile storage media may be received. The data may comprise information identifying each of a plurality of dies included in the non-volatile storage media and a number of blocks included in each of the plurality of dies. A number of spare blocks included in each of the plurality of dies may be determined. First and second sets of the plurality of dies may be identified, wherein the first set has a higher number of spare blocks than the second set. A first workload may be assigned to the first set of dies, the first workload being classified as write-intensive. A second workload may be assigned to the second set of dies, the second workload being classified as read-intensive.

Abstract: A data storage device includes a solid-state non-volatile memory including a plurality of memory cells and a controller. The controller is configured to reduce a read disturb effect of at least a portion of the solid-state non-volatile memory at least in part by receiving or accessing data to be written to the solid-state non-volatile memory, encoding the data using a programming pattern that favors a first programming state over a second programming state, the first programming state being associated with a higher voltage level than the second programming state, and writing the encoded data to the solid-state non-volatile memory.

Abstract: A data storage device includes a solid-state memory including memory cells and a controller configured to implement a data protection programming scheme by programming a first subset of the cells to a first voltage state using a first target voltage, programs a second subset to a second voltage state using a second target voltage higher than the first target voltage, programs a third subset to a third voltage state using a third target voltage higher than the second target voltage, and programs a fourth subset to a fourth voltage state using a fourth target voltage higher than the third target voltage. A difference in voltage between the fourth target voltage and the third target voltage may be greater or less than a difference in voltage between the third target voltage and the second target voltage and/or a difference in voltage between the second target voltage and the first target voltage.

Abstract: A data storage device includes a solid-state non-volatile memory including a plurality of memory cells and a controller. The controller is configured to reduce a read disturb effect of at least a portion of the solid-state non-volatile memory at least in part by receiving or accessing data to be written to the solid-state non-volatile memory, encoding the data using a programming pattern that favors a first programming state over a second programming state, the first programming state being associated with a higher voltage level than the second programming state, and writing the encoded data to the solid-state non-volatile memory.

Abstract: Systems and methods are disclosed for programming data in non-volatile memory arrays. A data storage device includes a solid-state non-volatile memory including a plurality of memory cells and a controller configured to improve data retention or reduce read disturb of at least a portion of the solid-state non-volatile memory at least in part by receiving data to be written to the solid-state non-volatile memory. The controller is further configured to, when a data retention programming mode is set, encode the data using a programming pattern that favors a first programming state over a second programming state, the first programming state being associated with a lower voltage level than the second programming state, and write the encoded data to the solid-state non-volatile memory. When a read disturb programming mode is set, the first programming state is associated with a higher voltage level than the second programming state.

Abstract: A data storage device includes a solid-state memory including memory cells and a controller configured to implement a data protection programming scheme by programming a first subset of the cells to a first voltage state using a first target voltage, programs a second subset to a second voltage state using a second target voltage higher than the first target voltage, programs a third subset to a third voltage state using a third target voltage higher than the second target voltage, and programs a fourth subset to a fourth voltage state using a fourth target voltage higher than the third target voltage. A difference in voltage between the fourth target voltage and the third target voltage may be greater or less than a difference in voltage between the third target voltage and the second target voltage and/or a difference in voltage between the second target voltage and the first target voltage.

Abstract: A data storage device includes a solid-state memory including memory cells and a controller configured to perform a first programming scheme that programs a first subset of the cells to a first voltage state using a first target voltage, programs a second subset to a second voltage state using a second target voltage higher than the first target voltage, programs a third subset to a third voltage state using a third target voltage higher than the second target voltage, and programs a fourth subset to a fourth voltage state using a fourth target voltage higher than the third target voltage. A difference in voltage between the fourth target voltage and the third target voltage may be greater or less than a difference in voltage between the third target voltage and the second target voltage and/or a difference in voltage between the second target voltage and the first target voltage.

Abstract: A data storage device includes a solid-state memory including memory cells and a controller configured to perform a first programming scheme that programs a first subset of the cells to a first voltage state using a first target voltage, programs a second subset to a second voltage state using a second target voltage higher than the first target voltage, programs a third subset to a third voltage state using a third target voltage higher than the second target voltage, and programs a fourth subset to a fourth voltage state using a fourth target voltage higher than the third target voltage. A difference in voltage between the fourth target voltage and the third target voltage may be greater or less than a difference in voltage between the third target voltage and the second target voltage and/or a difference in voltage between the second target voltage and the first target voltage.

Abstract: Systems and methods are disclosed for programming data in non-volatile memory arrays. A data storage device includes a solid-state non-volatile memory including a plurality of memory cells and a controller configured to improve data retention or reduce read disturb of at least a portion of the solid-state non-volatile memory at least in part by receiving data to be written to the solid-state non-volatile memory. The controller is further configured to, when a data retention programming mode is set, encode the data using a programming pattern that favors a first programming state over a second programming state, the first programming state being associated with a lower voltage level than the second programming state, and write the encoded data to the solid-state non-volatile memory. When a read disturb programming mode is set, the first programming state is associated with a higher voltage level than the second programming state.