Patents by Inventor Abhinandan Venugopal

Abhinandan Venugopal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11281405
    Abstract: Aspects of a storage device including a plurality of dies and a controller are provided which allow for asymmetric die operation handling so that controller overheads associated with common resource intensive operations may be incurred in the background without delaying subsequent die operations. When the controller receives a command to perform an MLC operation such as programming a number of dies, the controller refrains from performing the MLC operation in one or more of the dies for a period of time while simultaneously performing the MLC operation in a remainder of the dies. Instead, the controller performs another operation, such as an SLC operation, another MLC operation, or a transfer operation, that involves a common resource in these dies during the period of time. Controller overheads associated with these other operations thus are incurred without creating bottlenecks when the number of dies is large, thereby improving storage device performance.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: March 22, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Amit Sharma, Abhinandan Venugopal, Dinesh Kumar Agarwal
  • Patent number: 11262947
    Abstract: An apparatus includes a plurality of memory die and a controller coupled to the plurality of memory die. The controller is configured to selectively process a plurality of random read commands in such a way to reduce a total time required to execute the random read commands.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: March 1, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Abhinandan Venugopal, Amit Sharma, Dinesh Kumar Agarwal
  • Publication number: 20210397517
    Abstract: Example storage systems, storage devices, and methods provide dynamic redundant array of independent disks (RAID) stripe allocation based on memory device health conditions. A device health condition is assigned to each data chunk of a RAID stripe before the data chunk is sent to the target storage device. The write command indicates the device health condition and the receiving storage device selects the storage location for the data chunk corresponding to the device health condition.
    Type: Application
    Filed: June 23, 2020
    Publication date: December 23, 2021
    Inventors: Amit Sharma, Dinesh Kumar Agarwal, Abhinandan Venugopal
  • Publication number: 20210382818
    Abstract: Disclosed herein is a solid-state storage device that reduces read time for read time-sensitive data (“RTS data”). Data-characterizing logic characterizes incoming data from a host system as primary data including the RTS data or secondary data including non-RTS data. Memory-cell programming schemes include a primary data-programming scheme for a reduced read-frequency zone for the primary data and a secondary data-programming scheme standard read-frequency zone for the secondary data. Data routing logic routes the primary data to a plurality of physical pages corresponding to lower logical pages of a plurality of logical pages in the at-least-one reduced read-frequency zone with assistance by a logical-to-physical address translator. The lower logical pages require fewer read operations than upper logical pages of the plurality of logical pages to read the primary data, which results in a reduction of the read time for the RTS data in the at-least-one reduced read-frequency zone.
    Type: Application
    Filed: June 8, 2020
    Publication date: December 9, 2021
    Inventors: Amit Sharma, Abhinandan Venugopal, Vijay Chinchole
  • Publication number: 20210382652
    Abstract: Aspects of a storage device including a plurality of dies and a controller are provided which allow for asymmetric die operation handling so that controller overheads associated with common resource intensive operations may be incurred in the background without delaying subsequent die operations. When the controller receives a command to perform an MLC operation such as programming a number of dies, the controller refrains from performing the MLC operation in one or more of the dies for a period of time while simultaneously performing the MLC operation in a remainder of the dies. Instead, the controller performs another operation, such as an SLC operation, another MLC operation, or a transfer operation, that involves a common resource in these dies during the period of time. Controller overheads associated with these other operations thus are incurred without creating bottlenecks when the number of dies is large, thereby improving storage device performance.
    Type: Application
    Filed: June 8, 2020
    Publication date: December 9, 2021
    Inventors: Amit Sharma, Abhinandan Venugopal, Dinesh Kumar Agarwal
  • Patent number: 11159176
    Abstract: A decoding system and method of a non-volatile memory are provided in which information regarding a characteristic of a non-volatile memory is used to determine an initial log-likelihood-ratio (LLR) table from among a number of LLR tables. The decoding is then performed using the determined initial LLR table.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: October 26, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Abhinandan Venugopal, Amit Sharma, Vinayak Bhat, Eran Sharon, Ran Zamir, Alexander Bazarsky
  • Publication number: 20210157522
    Abstract: An apparatus includes a plurality of memory die and a controller coupled to the plurality of memory die. The controller is configured to selectively process a plurality of random read commands in such a way to reduce a total time required to execute the random read commands.
    Type: Application
    Filed: November 27, 2019
    Publication date: May 27, 2021
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Abhinandan Venugopal, Amit Sharma, Dinesh Kumar Agarwal