Patents by Inventor Abhinav CHANDRA

Abhinav CHANDRA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ANALOG-TO-DIGITAL CONVERTER (ADC) HAVING LINEARIZATION CIRCUIT WITH RECONFIGURABLE LOOKUP TABLE (LUT) MEMORY AND CALIBRATION OPTIONS
    Publication number: 20240372557
    Abstract: A circuit includes a nonlinear analog-to-digital converter (ADC) configured to provide a first digital output based on an analog input signal. The circuit also includes a linearization circuit having a lookup table (LUT) memory configured to store initial calibration data. The linearization circuit is coupled to the nonlinear ADC and is configured to: determine updated calibration data based on the initial calibration data; replace the initial calibration data in the LUT memory with the updated calibration data; and provide a second digital output at a linearization circuit output of the linearization circuit based on the first digital output and the updated calibration data.
    Type: Application
    Filed: July 15, 2024
    Publication date: November 7, 2024
    Inventors: Narasimhan RAJAGOPAL, Nithin GOPINATH, Viswanathan NAGARAJAN, Neeraj SHRIVASTAVA, Visvesvaraya A. PENTAKOTA, Harshit MOONDRA, Abhinav CHANDRA
  • Analog-to-digital converter (ADC) having linearization circuit with reconfigurable lookup table (LUT) memory and calibration options
    Patent number: 12074607
    Abstract: A circuit includes a nonlinear analog-to-digital converter (ADC) configured to provide a first digital output based on an analog input signal. The circuit also includes a linearization circuit having a lookup table (LUT) memory configured to store initial calibration data. The linearization circuit is coupled to the nonlinear ADC and is configured to: determine updated calibration data based on the initial calibration data; replace the initial calibration data in the LUT memory with the updated calibration data; and provide a second digital output at a linearization circuit output of the linearization circuit based on the first digital output and the updated calibration data.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: August 27, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Narasimhan Rajagopal, Nithin Gopinath, Viswanathan Nagarajan, Neeraj Shrivastava, Visvesvaraya A. Pentakota, Harshit Moondra, Abhinav Chandra
  • ANALOG-TO-DIGITAL CONVERTER (ADC) HAVING LINEARIZATION CIRCUIT WITH RECONFIGURABLE LOOKUP TABLE (LUT) MEMORY AND CALIBRATION OPTIONS
    Publication number: 20230387932
    Abstract: A circuit includes a nonlinear analog-to-digital converter (ADC) configured to provide a first digital output based on an analog input signal. The circuit also includes a linearization circuit having a lookup table (LUT) memory configured to store initial calibration data. The linearization circuit is coupled to the nonlinear ADC and is configured to: determine updated calibration data based on the initial calibration data; replace the initial calibration data in the LUT memory with the updated calibration data; and provide a second digital output at a linearization circuit output of the linearization circuit based on the first digital output and the updated calibration data.
    Type: Application
    Filed: May 26, 2022
    Publication date: November 30, 2023
    Inventors: Narasimhan RAJAGOPAL, Nithin GOPINATH, Viswanathan NAGARAJAN, Neeraj SHRIVASTAVA, Visvesvaraya A. PENTAKOTA, Harshit MOONDRA, Abhinav CHANDRA