Patents by Inventor Abhinav GOLAS
Abhinav GOLAS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11423520Abstract: In one embodiment, a method includes projecting a triangle primitive of an object defined in three-dimensional space onto a two-dimensional space, accessing a distortion map generated based on distortion characteristics of a display system, distorting a grid representation of a screen of the display system using the distortion map, determining a visibility of the triangle primitive relative to pixels of the screen by comparing the projected triangle primitive and the distorted grid representation of the screen, rendering an image based on the determined visibility of the triangle primitive, the rendered image being configured to be displayed by the screen of the display system having the distortion characteristics.Type: GrantFiled: October 30, 2020Date of Patent: August 23, 2022Assignee: Facebook Technologies, LLC.Inventor: Abhinav Golas
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Publication number: 20220138915Abstract: In one embodiment, a method includes projecting a triangle primitive of an object defined in three-dimensional space onto a two-dimensional space, accessing a distortion map generated based on distortion characteristics of a display system, distorting a grid representation of a screen of the display system using the distortion map, determining a visibility of the triangle primitive relative to pixels of the screen by comparing the projected triangle primitive and the distorted grid representation of the screen, rendering an image based on the determined visibility of the triangle primitive, the rendered image being configured to be displayed by the screen of the display system having the distortion characteristics.Type: ApplicationFiled: October 30, 2020Publication date: May 5, 2022Inventor: Abhinav Golas
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Patent number: 11315225Abstract: Inventive aspects include a binning unit for coarse depth culling during binning of pixel geometries. The binning unit includes a rasterizer to receive primitives, and generates pixel coverage information and depth information. The binning unit includes one or more local culling stages to perform local culling within a window of primitives. The local culling unit outputs a set of surviving coverage and surviving depth information. The binning unit includes one or more global culling stages to use the set of the surviving coverage and the surviving depth information to further cull based on an entirety of previously received coverage information and depth information.Type: GrantFiled: December 18, 2019Date of Patent: April 26, 2022Inventors: Abhinav Golas, Nicholas Sohre, Santosh George Abraham
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Patent number: 11049269Abstract: A method of performing adaptive shading of image frames by a graphics processing unit (GPU) includes determining, by the GPU, a first shading rate based on determining that a change in a plurality of underlying assets between a first image frame and a second image frame is above a first threshold; determining, by the GPU, a second shading rate based on determining that one or more viewports in the second image frame is similar to one or more viewports in the first image frame; determining, by the GPU, a third shading rate based on determining that a quality reduction filter is used; and selecting, by the GPU, a shading rate from among the first shading rate, the second shading rate, and the third shading rate for the first image frame.Type: GrantFiled: December 30, 2019Date of Patent: June 29, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Abhinav Golas, Nicholas Sohre
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Publication number: 20200402217Abstract: Inventive aspects include a binning unit for coarse depth culling during binning of pixel geometries. The binning unit includes a rasterizer to receive primitives, and generates pixel coverage information and depth information. The binning unit includes one or more local culling stages to perform local culling within a window of primitives. The local culling unit outputs a set of surviving coverage and surviving depth information. The binning unit includes one or more global culling stages to use the set of the surviving coverage and the surviving depth information to further cull based on an entirety of previously received coverage information and depth information.Type: ApplicationFiled: December 18, 2019Publication date: December 24, 2020Inventors: Abhinav GOLAS, Nicholas SOHRE, Santosh George ABRAHAM
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Patent number: 10776957Abstract: A method of variable rate compression including: partitioning the image data into a plurality of blocks, each including channel-blocks; and for one of the one or more non-flat channel-blocks: generating a residual block including residual values corresponding to values of the one of the one or more non-flat blocks; in response to determining that a particular residual value of the residual values is equal to a corresponding previous residual value: incrementing a run counter; and in response to determining that the run counter is greater than a threshold, generating a run-mode flag and writing the run-mode flag after the particular residual value in a compressed output stream; and in response to determining that the particular residual value is not equal to a corresponding previous value: in response to determining that the run counter is greater than the threshold, generating a run-length after the run-mode flag in the compressed output stream.Type: GrantFiled: January 18, 2019Date of Patent: September 15, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Nicholas Sohre, Abhinav Golas
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Publication number: 20200143550Abstract: A method of performing adaptive shading of image frames by a graphics processing unit (GPU) includes determining, by the GPU, a first shading rate based on determining that a change in a plurality of underlying assets between a first image frame and a second image frame is above a first threshold; determining, by the GPU, a second shading rate based on determining that one or more viewports in the second image frame is similar to one or more viewports in the first image frame; determining, by the GPU, a third shading rate based on determining that a quality reduction filter is used; and selecting, by the GPU, a shading rate from among the first shading rate, the second shading rate, and the third shading rate for the first image frame.Type: ApplicationFiled: December 30, 2019Publication date: May 7, 2020Inventors: Abhinav Golas, Nicholas Sohre
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Patent number: 10643339Abstract: An apparatus, system and method is provided to determine a motion of pixels in local regions of a scene, classify the motion into a speed category, and make decisions on how to render blocks of pixels. In one implementation the motion in a tile is classified into at least three different speed regimes. If the pixels in a tile are in a quasi-static speed regime, a determination is made whether or not to reuse a fraction of pixels from the previous frame. If the pixels are determined to be in a high speed regime, a decision is made whether or not a sampling rate may be reduced.Type: GrantFiled: March 6, 2018Date of Patent: May 5, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Abhinav Golas, Karthik Ramani, Christopher T. Cheng, John W. Brothers, Liangjun Zhang, Santosh Abraham, Ki Fung Chow
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Publication number: 20200105021Abstract: A method of variable rate compression including: partitioning the image data into a plurality of blocks, each including channel-blocks; and for one of the one or more non-flat channel-blocks: generating a residual block including residual values corresponding to values of the one of the one or more non-flat blocks; in response to determining that a particular residual value of the residual values is equal to a corresponding previous residual value: incrementing a run counter; and in response to determining that the run counter is greater than a threshold, generating a run-mode flag and writing the run-mode flag after the particular residual value in a compressed output stream; and in response to determining that the particular residual value is not equal to a corresponding previous value: in response to determining that the run counter is greater than the threshold, generating a run-length after the run-mode flag in the compressed output stream.Type: ApplicationFiled: January 18, 2019Publication date: April 2, 2020Inventors: Nicholas Sohre, Abhinav Golas
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Patent number: 10489204Abstract: A system includes a plurality of hardware resources, one or more processors configured to execute one or more programs to perform one or more operations; and a resource allocator configured to implement resource allocation of the plurality of hardware resources to a set of hardware threads. The resource allocation of the plurality of hardware resources is performed by: implementing a linked list comprising a plurality of nodes, wherein each of the plurality of nodes includes respective information regarding at least one of a next node or a previous node; allocating in a first order one or more ranges of free resources of the plurality of hardware resources to one or more nodes of the plurality of nodes; and releasing allocated nodes out-of-order in a second order distinct from the first order.Type: GrantFiled: January 31, 2017Date of Patent: November 26, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Abhinav Golas
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Patent number: 10403025Abstract: There is provided a method of a graphics processing system, the method including receiving dependency information for a set of interdependent images indicating a dependency across one or more compute shader and graphics workloads, and interleaving processing of the compute shader and graphics workloads for the set of interdependent images in accordance with the dependency information without recompiling a compute shader generating the one or more compute shader workloads.Type: GrantFiled: September 11, 2018Date of Patent: September 3, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Abhinav Golas, Michael Fertig
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Patent number: 10282889Abstract: One or more embodiments of the present disclosure provide an apparatus used in source data compression, comprising a memory and a at least one processor. The memory is configured to store vertex attribute data and a set of instructions. The processor is coupled to the memory. The processor is configured to receive a source data stream that includes one or more values corresponding to the vertex attribute data. The processor is also configured to provide a dictionary for the one or more values in the source data stream, wherein the dictionary includes a plurality of index values corresponding to the one or more values in the source data stream. The processor is also configured to lace at least some of the one or more values in the source data stream with corresponding index values of the plurality of index values.Type: GrantFiled: February 14, 2017Date of Patent: May 7, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: David C. Tannenbaum, Manshila Adlakha, Vikash Kumar, Abhinav Golas
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Patent number: 10244250Abstract: A fixed rate compressor is used to perform variable rate texture compression. A texture image is accessed. A block size used to compress the image is automatically varied over the image to achieve variable rate texture compression. The block size may be selected to reduce the compressed texture image size and adapted in local regions of the texture image based on quality considerations, such as a quality condition that an error for each block be less that a threshold error. The restriction on block size and block types may be selected to perform decompression with hardware conventionally used to perform decompression of fixed-rate blocks. The quality condition may be user-selectable by a user input to provide additional control over the tradeoffs between quality and compression.Type: GrantFiled: April 13, 2016Date of Patent: March 26, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Pavel Krajcevski, Karthik Ramani, Abhinav Golas
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Publication number: 20190005703Abstract: There is provided a method of a graphics processing system, the method including receiving dependency information for a set of interdependent images indicating a dependency across one or more compute shader and graphics workloads, and interleaving processing of the compute shader and graphics workloads for the set of interdependent images in accordance with the dependency information without recompiling a compute shader generating the one or more compute shader workloads.Type: ApplicationFiled: September 11, 2018Publication date: January 3, 2019Inventors: Abhinav Golas, Michael Fertig
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Patent number: 10115177Abstract: A method of variable rate compression of image data in an image pipeline of a graphics processing system, the method includes identifying, by a processor of the graphics processing system, a set of cTiles associated with the image data, each cTile including a plurality of pixels, for each cTile of the set of cTiles identifying, by the processor, a pivot pixel from among the plurality of pixels, identifying, by the processor, a compression type of the cTile by comparing, bit-by-bit , pixels within the cTile with the pivot pixel, and compressing, by the processor, the cTile based on the identified compression type, and generating, by the processor, a metadata entry associated with the set of cTiles, the metadata entry indicating the compression type of each one of the set of cTiles and defining a mapping between an uncompressed address space of the set of cTiles and a compressed address space.Type: GrantFiled: August 14, 2017Date of Patent: October 30, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Abhinav Golas, Sangheon Lee, Vandit Mehra
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Patent number: 10089775Abstract: A graphics system interleaves a combination of graphics renderer operations and compute shader operations. A set of API calls is analyzed to determine dependencies and identify candidates for interleaving. A compute shader is adapted to have a tiled access pattern. The interleaving is scheduled to reduce a requirement to access an external memory to perform reads and writes of intermediate data.Type: GrantFiled: December 28, 2015Date of Patent: October 2, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: John W. Brothers, Joohoon Lee, Abhinav Golas
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Publication number: 20180217868Abstract: A system includes a plurality of hardware resources, one or more processors configured to execute one or more programs to perform one or more operations; and a resource allocator configured to implement resource allocation of the plurality of hardware resources to a set of hardware threads. The resource allocation of the plurality of hardware resources is performed by: implementing a linked list comprising a plurality of nodes, wherein each of the plurality of nodes includes respective information regarding at least one of a next node or a previous node; allocating in a first order one or more ranges of free resources of the plurality of hardware resources to one or more nodes of the plurality of nodes; and releasing allocated nodes out-of-order in a second order distinct from the first order.Type: ApplicationFiled: January 31, 2017Publication date: August 2, 2018Inventor: Abhinav Golas
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Publication number: 20180197304Abstract: An apparatus, system and method is provided to determine a motion of pixels in local regions of a scene, classify the motion into a speed category, and make decisions on how to render blocks of pixels. In one implementation the motion in a tile is classified into at least three different speed regimes. If the pixels in a tile are in a quasi-static speed regime, a determination is made whether or not to reuse a fraction of pixels from the previous frame. If the pixels are determined to be in a high speed regime, a decision is made whether or not a sampling rate may be reduced.Type: ApplicationFiled: March 6, 2018Publication date: July 12, 2018Inventors: Abhinav Golas, Karthik Ramani, Christopher T. Cheng, John W. Brothers, Liangjun Zhang, Santosh Abraham, Ki Fung Chow
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Publication number: 20180150991Abstract: One or more embodiments of the present disclosure provide an apparatus used in source data compression, comprising a memory and a at least one processor. The memory is configured to store vertex attribute data and a set of instructions. The processor is coupled to the memory. The processor is configured to receive a source data stream that includes one or more values corresponding to the vertex attribute data. The processor is also configured to provide a dictionary for the one or more values in the source data stream, wherein the dictionary includes a plurality of index values corresponding to the one or more values in the source data stream. The processor is also configured to lace at least some of the one or more values in the source data stream with corresponding index values of the plurality of index values.Type: ApplicationFiled: February 14, 2017Publication date: May 31, 2018Inventors: David C. Tannenbaum, Manshila Adlakha, Vikash Kumar, Abhinav Golas
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Patent number: 9947071Abstract: A graphics system supports variable rate compression and decompression of texture data and color data. An individual block of data is analyzed to determine a compression data type from a plurality of different compression data types having different compression lengths. The compression data types may include a compression data type for a block having a constant (flat) pixel value over n×n pixels, compression data type in which a subset of 3 or 4 values represents a plane or gradient, and wavelet or other compression type to represent higher frequency content. Additionally, metadata indexing provides information to map between an uncompressed address to a compressed address. To reduce the storage requirement, the metadata indexing permits two or more duplicate data blocks to reference the same piece of compressed data.Type: GrantFiled: June 17, 2015Date of Patent: April 17, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Karthik Ramani, Abhinav Golas, John W. Brothers