Patents by Inventor Abhiram Saligram Chandrashekar

Abhiram Saligram Chandrashekar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Write assist for memories with resistive bit lines
    Patent number: 10109345
    Abstract: Techniques efficiently assist in performing write operations in memories with resistive bit lines. A memory can comprise memory cells associated with respective word lines and bit lines. A write assist component can be associated with a subset of the memory cells associated with a bit line. Configuration of the write assist component can be based on the type of transistors employed by write circuits associated with the memory cells. During a write operation, the write assist component adds an additional current path to the ground, or the power supply, or both, at or in proximity to the far end of the write bit line when an appropriate write polarity is applied to the bit line by the driver at the other end of the bit line. This mitigates the effects of resistance of the bit line, which mitigates IR loss of the write signal.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: October 23, 2018
    Assignee: AMPERE COMPUTING LLC
    Inventors: Russell Homer, Abhiram Saligram Chandrashekar, Alfred Yeung
  • WRITE ASSIST FOR MEMORIES WITH RESISTIVE BIT LINES
    Publication number: 20180261279
    Abstract: Techniques efficiently assist in performing write operations in memories with resistive bit lines. A memory can comprise memory cells associated with respective word lines and bit lines. A write assist component can be associated with a subset of the memory cells associated with a bit line. Configuration of the write assist component can be based on the type of transistors employed by write circuits associated with the memory cells. During a write operation, the write assist component adds an additional current path to the ground, or the power supply, or both, at or in proximity to the far end of the write bit line when an appropriate write polarity is applied to the bit line by the driver at the other end of the bit line. This mitigates the effects of resistance of the bit line, which mitigates IR loss of the write signal.
    Type: Application
    Filed: May 15, 2018
    Publication date: September 13, 2018
    Inventors: Russell HOMER, Abhiram Saligram CHANDRASHEKAR, Alfred YEUNG
  • Write assist for memories with resistive bit lines
    Patent number: 10049725
    Abstract: Techniques efficiently assist in performing write operations in memories with resistive bit lines. A memory can comprise memory cells associated with respective word lines and bit lines. A write assist component can be associated with a subset of the memory cells associated with a bit line. Configuration of the write assist component can be based on the type of transistors employed by write circuits associated with the memory cells. During a write operation, the write assist component adds an additional current path to the ground, or the power supply, or both, at or in proximity to the far end of the write bit line when an appropriate write polarity is applied to the bit line by the driver at the other end of the bit line. This mitigates the effects of resistance of the bit line, which mitigates IR loss of the write signal.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: August 14, 2018
    Assignee: AMPERE COMPUTING LLC
    Inventors: Russell Homer, Abhiram Saligram Chandrashekar, Alfred Yeung
  • WRITE ASSIST FOR MEMORIES WITH RESISTIVE BIT LINES
    Publication number: 20180166126
    Abstract: Techniques efficiently assist in performing write operations in memories with resistive bit lines. A memory can comprise memory cells associated with respective word lines and bit lines. A write assist component can be associated with a subset of the memory cells associated with a bit line. Configuration of the write assist component can be based on the type of transistors employed by write circuits associated with the memory cells. During a write operation, the write assist component adds an additional current path to the ground, or the power supply, or both, at or in proximity to the far end of the write bit line when an appropriate write polarity is applied to the bit line by the driver at the other end of the bit line. This mitigates the effects of resistance of the bit line, which mitigates IR loss of the write signal.
    Type: Application
    Filed: December 8, 2016
    Publication date: June 14, 2018
    Inventors: Russell Homer, Abhiram Saligram Chandrashekar, Alfred Yeung