Patents by Inventor Abhishek A. Sharma

Abhishek A. Sharma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210297801
    Abstract: Systems, apparatuses and methods may provide away to render augmented reality (AR) and/or virtual reality (VR) sensory enhancements using ray tracing. More particularly, systems, apparatuses and methods may provide a way to normalize environment information captured by multiple capture devices, and calculate, for an observer, the sound sources or sensed events vector paths. The systems, apparatuses and methods may detect and/or manage one or more capture devices and assign one or more the capture devices based on one or more conditions to provide observer an immersive VR/AR experience.
    Type: Application
    Filed: December 28, 2020
    Publication date: September 23, 2021
    Inventors: Joydeep Ray, Travis T. Schluessler, Prasoonkumar Surti, John H. Feit, Nikos Kaburlasos, Jacek Kwiatkowski, Abhishek R. Appu, James M. Holland, Jeffery S. Boles, Jonathan Kennedy, Louis Feng, Atsuo Kuwahara, Barnan Das, Narayan Biswal, Stanley J. Baran, Gokcen Cilingir, Nilesh V. Shah, Archie Sharma, Mayuresh M. Varerkar
  • Patent number: 11127861
    Abstract: An embodiment includes an apparatus comprising: a thin film transistor (TFT) comprising: source and drain contacts; first and second gate contacts: a semiconductor material, comprising a channel, between the first and second gate contacts; and a first dielectric layer, between the first and second gate contacts, to fix charged particles. Other embodiments are described herein.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: September 21, 2021
    Assignee: Intel Corporation
    Inventor: Abhishek A. Sharma
  • Publication number: 20210288108
    Abstract: Embodiments include a threshold switching selector. The threshold switching selector may include a threshold switching layer and a semiconductor layer between two electrodes. A memory cell may include the threshold switching selector coupled to a storage cell. The storage cell may be a PCRAM storage cell, a MRAM storage cell, or a RRAM storage cell. In addition, a RRAM device may include a RRAM storage cell, coupled to a threshold switching selector, where the threshold switching selector may include a threshold switching layer and a semiconductor layer, and the semiconductor layer of the threshold switching selector may be shared with the semiconductor layer of the RRAM storage cell.
    Type: Application
    Filed: September 23, 2016
    Publication date: September 16, 2021
  • Patent number: 11121073
    Abstract: An interconnect structure is disclosed. The interconnect structure includes a first metal interconnect in a bottom dielectric layer, a via that extends through a top dielectric layer, a metal plate, an intermediate dielectric layer, and an etch stop layer, and a metal in the via to extend through the top dielectric layer, the metal plate, the intermediate dielectric layer and the etch stop layer to the top surface of the first metal interconnect. The metal plate is coupled to an MIM capacitor that is parallel to the via. The second metal interconnect is on top of the metal in the via.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: September 14, 2021
    Assignee: Intel Corporation
    Inventors: Travis Lajoie, Abhishek Sharma, Juan Alzate-Vinasco, Chieh-Jen Ku, Shem Ogadhoh, Allen Gardiner, Blake Lin, Yih Wang, Pei-Hua Wang, Jack T. Kavalieros, Bernhard Sell, Tahir Ghani
  • Patent number: 11120228
    Abstract: This disclosure relates generally to data processing, and more particularly to a method and system for generating ground truth labels for ambiguous domain specific tasks. The system generates reference data corresponding to a regulation statement being processed, using a crowd sourcing mechanism and then processes the reference data using an Expectation Maximization (EM) model. The EM model determines consensus with respect to ambiguity of terms/phrases, validity of questions, and validity of answers, and then based on the determined consensus, provides questions and answers to disambiguate the regulation statement.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: September 14, 2021
    Assignee: Tata Consultancy Services Limited
    Inventors: Manasi Samarth Patwardhan, Abhishek Sainani, Shirish Karande, Smita Ghaisas, Richa Sharma
  • Publication number: 20210279062
    Abstract: Methods, systems and computer program products are provided for automated runtime configuration for dataflows to automatically select or adapt a runtime environment or resources to a dataflow plan prior to execution. Metadata generated for dataflows indicates dataflow information, such as numbers and types of sources, sinks and operations, and the amount of data being consumed, processed and written. Weighted dataflow plans are created from unweighted dataflow plans based on metadata. Weights that indicate operation complexity or resource consumption are generated for data operations. A runtime environment or resources to execute a dataflow plan is/are selected based on the weighted dataflow and/or a maximum flow. Preferences may be provided to influence weighting and runtime selections.
    Type: Application
    Filed: March 6, 2020
    Publication date: September 9, 2021
    Inventors: Abhishek Uday Kumar Shah, Anudeep Sharma, Mark A. Kromer, Jikai Ma
  • Patent number: 11114471
    Abstract: Thin film transistors having relatively increased width and shared bitlines are described. In an example, an integrated circuit structure includes a plurality of transistors formed in an insulator structure above a substrate. The plurality of transistors arranged in a column such that the respective lateral arrangement of the source, the gate, and the drain of each of the transistors aligns with an adjacent thin film transistor, wherein the plurality transistors extend vertically through the insulator structure at least two interconnect levels to provide increased relative width. A first conductive contact is formed between one of sources and drains of at least two of the plurality of transistors in the column, and the conductive contact extends through the insulator structure at least two interconnect levels.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: September 7, 2021
    Assignee: Intel Corporation
    Inventors: Brian S. Doyle, Abhishek A. Sharma, Ravi Pillarisetty, Prashant Majhi, Elijah V. Karpov
  • Publication number: 20210272332
    Abstract: A standalone image reconstruction device is configured to reconstruct the raw signals received from a radiology scanner device into a reconstructed output signal. The image reconstruction device is a vendor neutral interface between the radiology scanner device and the post processing imaging device. The reconstructed output signal is a user readable domain that can be used to generate a medical image or a three-dimensional (3D) volume. The apparatus is configured to reconstruct signals from different types of radiology scanner devices using any suitable image reconstruction protocol.
    Type: Application
    Filed: February 28, 2020
    Publication date: September 2, 2021
    Applicant: Shanghai United Imaging Intelligence Co., LTD.
    Inventors: Arun Innanje, Shanhui Sun, Abhishek Sharma, Zhang Chen, Ziyan Wu
  • Publication number: 20210272014
    Abstract: Data samples are transmitted from a central server to at least one local server apparatus. The central server receives a set of predictions from the at least one local server apparatus that are based on the transmitted set of data samples. The central server trains a central model based on the received set of predictions. The central model, or a portion of the central model corresponding to a task of interest, can then be sent to the at least one local server apparatus. Neither local data from local sites nor trained models from the local sites are transmitted to the central server. This ensures protection and security of data at the local sites.
    Type: Application
    Filed: February 28, 2020
    Publication date: September 2, 2021
    Applicant: Shanghai United Imaging Intelligence Co., LTD.
    Inventors: Srikrishna Karanam, Ziyan Wu, Abhishek Sharma, Arun Innanje, Terrence Chen
  • Publication number: 20210272258
    Abstract: Abnormality detection within a defined area includes obtaining a plurality of images of the defined area from image-capture devices. An extent of deviation of one or more types of products from an inference of each of the plurality of images is determined using a trained neural network. A localized dimensional representation is generated in a portion of an input image associated with a first location of the plurality of locations, based on gradients computed from the determined extent of deviation. The generated localized dimensional representation provides a visual indication of an abnormality located in the first location within the defined area. An action associated with the first location is executed based on the generated dimensional representation for proactive control or prevention of occurrence of undesired event in the defined area.
    Type: Application
    Filed: February 27, 2020
    Publication date: September 2, 2021
    Inventors: Abhishek Sharma, Meng Zheng, Srikrishna Karanam, Ziyan Wu, Arun Innanje, Terrence Chen
  • Publication number: 20210264163
    Abstract: A mechanism is described for facilitating person tracking and data security in machine learning at autonomous machines. A method of embodiments, as described herein, includes detecting, by a camera associated with one or more trackers, a person within a physical vicinity, where detecting includes capturing one or more images the person. The method may further include tracking, by the one or more trackers, the person based on the one or more images of the person, where tracking includes collect tracking data relating to the person. The method may further include selecting a tracker of the one or more trackers as a preferred tracker based on the tracking data.
    Type: Application
    Filed: February 11, 2021
    Publication date: August 26, 2021
    Applicant: Intel Corporation
    Inventors: Mayuresh M. Varerkar, Barnan Das, Narayan Biswal, Stanley J. Baran, Gokcen Cilingir, Nilesh V. Shah, Archie Sharma, Sherine Abdelhak, Sachin Godse, Farshad Akhbari, Narayan Srinivasa, Altug Koker, Nadathur Rajagopalan Satish, Dukhwan Kim, Feng Chen, Abhishek R. Appu, Joydeep Ray, Ping T. Tang, Michael S. Strickland, Xiaoming Chen, Anbang Yao, Tatiana Shpeisman, Vasanth Ranganathan, Sanjeev Jahagirdar
  • Patent number: 11101376
    Abstract: Embodiments related to transistors having one or more non-planar transition metal dichalcogenide cladding layers, integrated circuits and systems incorporating such transistors, and methods for fabricating them are discussed.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: August 24, 2021
    Assignee: Intel Corporation
    Inventors: Ravi Pillarisetty, Abhishek Sharma, Van H. Le, Gilbert Dewey, Willy Rachmady
  • Patent number: 11101377
    Abstract: Techniques and mechanisms for providing efficient transistor functionality of an integrated circuit. In an embodiment, a transistor device comprises a first body of a high mobility semiconductor and a second body of a wide bandgap semiconductor. The first body adjoins each of, and is disposed between, the second body and a gate dielectric layer of the transistor. The second body extends between, and variously adjoins, each of a source of the transistor and a drain of the transistor. A location of the second body mitigates current leakage that might otherwise occur via the first body. In another embodiment, a mobility of the first body is equal to or greater than 100 cm2/V·s, wherein a bandgap of the second body is equal to or greater than 2.0 eV.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: August 24, 2021
    Assignee: Intel Corporation
    Inventors: Abhishek A. Sharma, Gilbert Dewey, Van H. Le, Willy Rachmady, Ravi Pillarisetty
  • Publication number: 20210256078
    Abstract: Provided is a method, performed by an information processing device, of processing information by using an Internet of things (IoT) device, the method including: receiving, from a user, a web search query; fetching context information of at least one IoT device related to the web search query; automatically generating a synthetic web search query including the web search query and the context information of the at least one IoT device; and determining a control to be applied to the at least one IoT device by using a search result regarding the synthetic web search query.
    Type: Application
    Filed: June 3, 2019
    Publication date: August 19, 2021
    Inventors: Mainak CHOUDHURY, Abhishek SHARMA
  • Patent number: 11092690
    Abstract: A vehicle including one or more sensors, a light detection and ranging (lidar) sensor and a lidar prediction system. The one or more sensors include an optical sensor, a radar sensor, or both, configured to capture sensor data of a particular view. The lidar sensor is configured to capture lidar data of the particular view. The lidar prediction system includes a predictive model. The lidar prediction system is configured to generate a predicted lidar frame comprising applying the predictive model to the sensor data and send the predicted lidar frame to an external system.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: August 17, 2021
    Assignee: Apple Inc.
    Inventors: Peter Meier, Abhishek Sharma
  • Patent number: 11088204
    Abstract: A memory device includes a first electrode, a non-volatile memory element having a first terminal and a second terminal, where the first terminal is coupled to the first electrode. The memory device further includes a selector having a first terminal, a second terminal and a sidewall between the first and second terminals, where the second terminal of the selector is coupled to the first terminal of the non-volatile memory element. A second electrode is coupled to the second terminal of the selector and a third electrode laterally adjacent to the sidewall of the selector.
    Type: Grant
    Filed: September 30, 2017
    Date of Patent: August 10, 2021
    Assignee: Intel Corporation
    Inventors: Ravi Pillarisetty, Abhishek A. Sharma, Van H. Le, Jack T. Kavalieros, Willy Rachmady
  • Publication number: 20210243223
    Abstract: A computer-implemented method for computing or modeling the risk of a cyber security breach to an asset begins by gathering coverage information from network sensors, endpoint agents, and decoys related to the asset, as well as gathering importance information related to the asset, alerts and anomalies from an enterprise and vulnerability information related to the asset. From this, a threat-score is computed for the asset. Connections or coupling information is gathered between users and assets, users and data, and assets and data, which is fused to generate a 3-dimensional vector representation of coverage, importance, and threat-score of the assets, users and data. From this 3-dimensional vector, an asset risk score is computed to provide the asset risk score.
    Type: Application
    Filed: February 1, 2021
    Publication date: August 5, 2021
    Inventors: Anubhav Arora, Abhishek Sharma, Rami Mizrahi, Gerald Mancini, Abdul Rahman
  • Publication number: 20210232369
    Abstract: A dataflow programming language can be used to express reactive dataflow programs that can be used in pattern-driven real-time data analysis. One or more tools are provided for the dataflow programming language for checking syntactic and semantic correctness, checking logical correctness, debugging, translation of source code into a secure, portable format (e.g., packaged code), translation of source code (or packaged code) into platform-specific code, batch-mode interpretation, interactive interpretation, simulation and visualization of the dataflow environment, remote execution, monitoring, or any combination of these. These tools embody a method of developing, debugging, and deploying a dataflow graph device.
    Type: Application
    Filed: April 13, 2021
    Publication date: July 29, 2021
    Inventors: Abhishek Sharma, Jason Lucas
  • Patent number: 11075207
    Abstract: A 2T-2S SRAM cell exhibiting a complementary scheme, that includes two selector devices that exhibit negative differential resistance. Advantages include lower area and better performance than traditional SRAM cells, according to some embodiments. The term 1T-1S refers to a transistor in series with a selector device. Accordingly, the term 2T-2S refers to two such 1T-1S structures.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: July 27, 2021
    Assignee: Intel Corporation
    Inventors: Abhishek A. Sharma, Brian S. Doyle, Ravi Pillarisetty, Prashant Majhi
  • Publication number: 20210224468
    Abstract: A system includes a personal device in communication with a vehicle component and an on-board server and including a processor programmed to receive, from the component, an advertisement defining a low-footprint interface template and a unique identifier indicative of a corresponding rich content interface template, send, to the server, a request including the identifier to provide the corresponding template, and, upon receipt of the corresponding template, render a rich content user interface based on the corresponding template.
    Type: Application
    Filed: April 5, 2021
    Publication date: July 22, 2021
    Inventors: Pietro BUTTOLO, Yifan CHEN, James Stewart RANKIN, II, Mengchi WANG, Abhishek SHARMA, Stuart C. SALTER