Patents by Inventor Abhishek Agarwal
Abhishek Agarwal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12273413Abstract: A system for load management in a shared address networking architecture includes a primary point-of-presence (POP) group of servers configured to serve content of a domain and that are each reachable at an address of a first IP address block and a secondary PoP group of servers configured to serve the content of the domain and that are each reachable at an address of a second IP address block. The system further includes a traffic management agent configured to reduce a total volume of incoming requests received by the primary PoP group for a period of time following a return of a first server in the primary PoP group of servers to an online state by selectively directing a first percentage of the incoming requests to the second IP address block instead of the first IP address block.Type: GrantFiled: May 3, 2023Date of Patent: April 8, 2025Assignee: Microsoft Technology Licensing, LLCInventors: Rami Y. Al-Dalky, Nalin Raj Gupta, Abhishek Agarwal, Pradeepkumar Mani, Pranav Agarwal
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Publication number: 20250047601Abstract: A flow rate control method for solicited data communications includes receiving, at a first node of a communications network, a request-to-send (RTS) signal from a second node of the communications network, the RTS signal indicating a size of a solicited data transmission of the second node, determining, by the first node, whether a rate-limiting counter is above zero, wherein the rate-limiting counter is programmed to increase at a programmed rate and in response to the rate-limiting counter being above zero, scheduling, by the first node, a clear-to-send (CTS) signal to be sent from the first node to the second node over the communications network, and subtracting, by the first node, a value corresponding to the size of the solicited data transmission of the second node from the rate-limiting counter.Type: ApplicationFiled: October 25, 2024Publication date: February 6, 2025Inventors: Abhishek Agarwal, Ye Tang, Sean Clark, Sarin Thomas, Hugh McEvoy Walsh, Xiyu Wang
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Patent number: 12216587Abstract: A packet cache system includes a cache memory allocator for receiving a memory address corresponding to a non-cache memory and allocated to a packet, and associating the memory address with a cache memory address; a hash table for storing the memory address and the cache memory address, with the memory address as a key and the cache memory address as a value; a cache memory for storing the packet at a location indicated by the cache memory address; and an eviction engine for determining one or more cached packets to remove from the cache memory and place in the non-cache memory when occupancy of the cache memory is high.Type: GrantFiled: February 21, 2024Date of Patent: February 4, 2025Assignee: Google LLCInventors: Jiazhen Zheng, Srinivas Vaduvatha, Hugh McEvoy Walsh, Prashant R. Chandra, Abhishek Agarwal, Weihuang Wang, Weiwei Jiang
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Publication number: 20250036427Abstract: A method and device for reducing measurement error/s is provided. The method receives a file by an engineering tool from a system configurator tool and parses the file to identify a value associated with a transformer setting for a process bus device. The method fetches information from installation data to identify the value when the value is not identified in the file and stores the value in the engineering tool when the value is identified in the file or in the information. The method marks the value as a missing value to visually notify a technician when the value is not identified in the information or the file. The method publishes the value at a remote database for process bus subscriber device/s.Type: ApplicationFiled: December 7, 2022Publication date: January 30, 2025Inventors: Abhishek Agarwal, Stefan Flemming, Anjana A.R, Igor Kogan, Christian Liedtke
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Patent number: 12199746Abstract: Aspects of the disclosure are directed to supporting time synchronization across a datacenter network with greater accuracy. The time synchronization includes both software based and hardware based time synchronization mechanisms to provide more precise time synchronization across various nodes in the datacenter network. The software based mechanism can provide the initial coarse time synchronization while the hardware based mechanism can provide the subsequent finer time synchronization.Type: GrantFiled: October 19, 2022Date of Patent: January 14, 2025Assignee: Google LLCInventors: Abhishek Agarwal, Ye Tang, Prashant R. Chandra, Simon Luigi Sabato, Hema Hariharan
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Patent number: 12164439Abstract: Aspects of the disclosure are directed to a packet cache eviction engine for reliable transport protocols of a network. The packet cache eviction engine can manage on-chip cache occupancy by evicting lower priority packets to off-chip memory and ensuring that higher priority packets are kept on-chip to achieve higher performance and lower latency in processing packets in the network.Type: GrantFiled: June 2, 2023Date of Patent: December 10, 2024Assignee: Google LLCInventors: Chandan Muddamsetty, Jiazhen Zheng, Weiwei Jiang, Shivang Ghetia, Abhishek Agarwal, Srinivas Vaduvatha
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Publication number: 20240403228Abstract: Aspects of the disclosure are directed to a packet cache eviction engine for reliable transport protocols of a network. The packet cache eviction engine can manage on-chip cache occupancy by evicting lower priority packets to off-chip memory and ensuring that higher priority packets are kept on-chip to achieve higher performance and lower latency in processing packets in the network.Type: ApplicationFiled: June 2, 2023Publication date: December 5, 2024Inventors: Chandan Muddamsetty, Jiazhen Zheng, Weiwei Jiang, Shivang Ghetia, Abhishek Agarwal, Srinivas Vaduvatha
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Patent number: 12155573Abstract: A flow rate control method for solicited data communications includes receiving, at a first node of a communications network, a request-to-send (RTS) signal from a second node of the communications network, the RTS signal indicating a size of a solicited data transmission of the second node, determining, by the first node, whether a rate-limiting counter is above zero, wherein the rate-limiting counter is programmed to increase at a programmed rate and in response to the rate-limiting counter being above zero, scheduling, by the first node, a clear-to-send (CTS) signal to be sent from the first node to the second node over the communications network, and subtracting, by the first node, a value corresponding to the size of the solicited data transmission of the second node from the rate-limiting counter.Type: GrantFiled: April 5, 2022Date of Patent: November 26, 2024Assignee: Google LLCInventors: Abhishek Agarwal, Ye Tang, Sean Clark, Sarin Thomas, Hugh McEvoy Walsh, Xiyu Wang
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Publication number: 20240372912Abstract: A system for load management in a shared address networking architecture includes a primary point-of-presence (POP) group of servers configured to serve content of a domain and that are each reachable at an address of a first IP address block and a secondary PoP group of servers configured to serve the content of the domain and that are each reachable at an address of a second IP address block. The system further includes a traffic management agent configured to reduce a total volume of incoming requests received by the primary PoP group for a period of time following a return of a first server in the primary PoP group of servers to an online state by selectively directing a first percentage of the incoming requests to the second IP address block instead of the first IP address block.Type: ApplicationFiled: May 3, 2023Publication date: November 7, 2024Inventors: Rami Y. AL-DALKY, Nalin Raj GUPTA, Abhishek AGARWAL, Pradeepkumar MANI, Pranav AGARWAL
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Patent number: 12132802Abstract: An application specific integrated circuit (ASIC) is provided for reliable transport of packets. The network interface card may include a reliable transport accelerator (RTA). The RTA may include a cache lookup database. The RTA may be configured to determine, from a received data packet, a connection identifier and query the cache lookup database for a cache entry corresponding to a connection context having the connection identifier. In response to the query, the RTA may receive a cache hit or a cache miss.Type: GrantFiled: December 16, 2021Date of Patent: October 29, 2024Assignee: Google LLCInventors: Weihuang Wang, Srinivas Vaduvatha, Xiaoming Wang, Gurushankar Rajamani, Abhishek Agarwal, Jiazhen Zheng, Prashant Chandra
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Patent number: 12086588Abstract: Versions of an application are managed by receiving a request for a version of an application, retrieving, responsive to the received request, a version of a master application component based at least in part on version data that associates a version of the master application component with the version of the application, retrieving a relationship operable to relate the version of the master application component with a corresponding version of a first component on which the master application component depends for a function of the application, retrieving the corresponding version of the first component, responsive to the retrieving of the relationship, assembling the version of the application based at least in part on the retrieved version of the master component, the retrieved relationship, and the retrieved first component, and providing for an execution of the assembled version of the application.Type: GrantFiled: January 30, 2023Date of Patent: September 10, 2024Assignee: Microsoft Technology Licensing, LLCInventors: Akhil Gupta, Abhinav Jha, Prabhat Kumar Pandey, Abhishek Agarwal, Yasser Shaaban
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Publication number: 20240235710Abstract: Aspects of the disclosure are directed to supporting time synchronization across a datacenter network with greater accuracy. The time synchronization includes both software based and hardware based time synchronization mechanisms to provide more precise time synchronization across various nodes in the datacenter network. The software based mechanism can provide the initial coarse time synchronization while the hardware based mechanism can provide the subsequent finer time synchronization.Type: ApplicationFiled: October 19, 2022Publication date: July 11, 2024Inventors: Abhishek Agarwal, Ye Tang, Prashant R. Chandra, Simon Luigi Sabato, Hema Hariharan
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Patent number: 12019542Abstract: Aspects of the disclosure are directed to high performance connection cache eviction for reliable transport protocols in data center networking. Connection priorities for connection entries are determined to store the connection entries in a cache based on their connection priority. During cache eviction, the connection entries with a lowest connection priority are evicted from the cache. Cache eviction can be achieved with low latency at a high rate.Type: GrantFiled: August 8, 2022Date of Patent: June 25, 2024Assignee: Google LLCInventors: Abhishek Agarwal, Jiazhen Zheng, Srinivas Vaduvatha, Weihuang Wang, Hugh McEvoy Walsh, Weiwei Jiang, Ajay Venkatesan, Prashant R. Chandra
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Patent number: 12020051Abstract: Techniques of remote computing resource access using sharable links are disclosed herein. One example technique includes receiving, at a security portal of a private network, an access request from a client device of a user for accessing a virtual machine (“VM”) on the private network via a public network. The technique can then include retrieving a copy of a configuration file corresponding to the virtual machine according to the VM identifier in the access request and accessing the virtual machine according to operating parameters in the retrieved copy of the configuration file to generate an execution result. The technique can further include transmitting, from the security portal, the execution result to the client device of the user via the public network, thereby shielding, with the security portal, the virtual machine on the private network from actions initiated via the public network.Type: GrantFiled: January 17, 2020Date of Patent: June 25, 2024Assignee: MICROSOFT TECHNOLOGY LICENSING LLCInventors: Ankur Hayatnagarkar, Ashish Jain, Buyu Chen, Abhishek Agarwal, Sandeep Bansal, Mohit Garg, Aakash Valangaiman Radhakrishnan
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Publication number: 20240193093Abstract: A packet cache system includes a cache memory allocator for receiving a memory address corresponding to a non-cache memory and allocated to a packet, and associating the memory address with a cache memory address; a hash table for storing the memory address and the cache memory address, with the memory address as a key and the cache memory address as a value; a cache memory for storing the packet at a location indicated by the cache memory address; and an eviction engine for determining one or more cached packets to remove from the cache memory and place in the non-cache memory when occupancy of the cache memory is high.Type: ApplicationFiled: February 21, 2024Publication date: June 13, 2024Inventors: Jiazhen Zheng, Srinivas Vaduvatha, Hugh McEvoy Walsh, Prashant R. Chandra, Abhishek Agarwal, Weihuang Wang, Weiwei Jiang
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Patent number: 11995000Abstract: A packet cache system includes a cache memory allocator for receiving a memory address corresponding to a non-cache memory and allocated to a packet, and associating the memory address with a cache memory address; a hash table for storing the memory address and the cache memory address, with the memory address as a key and the cache memory address as a value; a cache memory for storing the packet at a location indicated by the cache memory address; and an eviction engine for determining one or more cached packets to remove from the cache memory and place in the non-cache memory when occupancy of the cache memory is high.Type: GrantFiled: June 7, 2022Date of Patent: May 28, 2024Assignee: Google LLCInventors: Jiazhen Zheng, Srinivas Vaduvatha, Hugh McEvoy Walsh, Prashant R. Chandra, Abhishek Agarwal, Weihuang Wang, Weiwei Jiang
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Publication number: 20240168996Abstract: A hash table system, including a plurality of hash tables, associated with respective hash functions, for storing key-value pairs; an overflow memory for storing key-value pairs moved from the hash tables due to collision; and an arbiter for arbitrating among commands including update commands, match commands, and rehash commands, wherein for each system clock cycle, the arbiter selects as a selected command one of an update command, a match command, or a rehash command, and wherein the hash table system completes execution of each selected command within a bounded number of system clock cycles.Type: ApplicationFiled: January 26, 2024Publication date: May 23, 2024Inventors: Weiwei Jiang, Srinivas Vaduvatha, Prashant R. Chandra, Jiazhen Zheng, Hugh McEvoy Walsh, Weihuang Wang, Abhishek Agarwal
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Patent number: 11979476Abstract: Aspects of the disclosure are directed to a high performance connection scheduler for reliable transport protocols in data center networking. The connection scheduler can handle enqueue events, dequeue events, and update events. The connection scheduler can include a connection queue, scheduling queue, and quality of service arbiter to support scheduling a large number of connections at a high rate.Type: GrantFiled: October 7, 2022Date of Patent: May 7, 2024Assignee: Google LLCInventors: Abhishek Agarwal, Weihuang Wang, Weiwei Jiang, Srinivas Vaduvatha, Jiazhen Zheng
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Publication number: 20240146758Abstract: A method, apparatus, and computer program are disclosed. The method may be performed by one or more processors and may comprise receiving first data representing an infrastructure of a computer network, the first data comprising an indication of hosts which form at least part of the computer network and one or more software resources on respective hosts. The method may also comprise receiving second data from a vulnerability scanning software, the second data comprising an indication of one or more vulnerabilities detected in the one or more software resources provided on at least some of the hosts of the computer network. Using a combination of the first data and the second data, output data may be generated representing a risk profile of the computer network infrastructure, the output data indicating one or more subsets of hosts, determined as being at risk of being affected by the detected vulnerabilities by virtue of the software resources they provide for output on a user interface.Type: ApplicationFiled: December 21, 2023Publication date: May 2, 2024Inventors: Elliot Colquhoun, Abhishek Agarwal, Andrew Eggleton, Brandon Helms, Carl Ambroselli, Cem Zorlular, Daniel Kelly, Gautam Punukollu, Jeffrey Tsui, Morten Kromann, Nikhil Seetharaman, Raj Krishnan, Samuel Jones, Tareq Alkhatib, Dayang Shi
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Publication number: 20240137140Abstract: Aspects of the disclosure are directed to supporting time synchronization across a datacenter network with greater accuracy. The time synchronization includes both software based and hardware based time synchronization mechanisms to provide more precise time synchronization across various nodes in the datacenter network. The software based mechanism can provide the initial coarse time synchronization while the hardware based mechanism can provide the subsequent finer time synchronization.Type: ApplicationFiled: October 18, 2022Publication date: April 25, 2024Inventors: Abhishek Agarwal, Ye Tang, Prashant R. Chandra, Simon Luigi Sabato, Hema Hariharan