Abstract: Presented herein are techniques for implementing a hybrid fractional-N sampling phase locked loop with accurate digital-to-time calibration. A method includes receiving, at a comparator, an output of a sampling phase detector of a phase locked loop, the output of the sampling phase detector of the phase locked loop also being supplied as a control source for a proportional control input of a voltage-controlled oscillator, supplying an output of the comparator as an input signal to a calibration loop of a digital-to-time converter, supplying an output of the digital-to-time converter to an input of the sampling phase detector, and supplying the output of the comparator as a control source for an integral control input of the voltage-controlled oscillator.

Abstract: Presented herein are techniques for implementing a hybrid fractional-N sampling phase locked loop with accurate digital-to-time calibration. A method includes receiving, at a comparator, an output of a sampling phase detector of a phase locked loop, the output of the sampling phase detector of the phase locked loop also being supplied as a control source for a proportional control input of a voltage-controlled oscillator, supplying an output of the comparator as an input signal to a calibration loop of a digital-to-time converter, supplying an output of the digital-to-time converter to an input of the sampling phase detector, and supplying the output of the comparator as a control source for an integral control input of the voltage-controlled oscillator.

Abstract: Piezoelectrically actuated devices constructed from thin semiconductor membranes bonded directly to piezoelectric substrates are provided. Methods for fabricating these devices are also provided. The bonding of the semiconductor to the piezoelectric material does not require the use of any intermediate layers, such as bonding agents.

Abstract: A receiver is provided that includes a plurality of sub-rate receiver lanes each of which is configured to receive an analog receive signal from an analog front-end and produce digital sub-rate receiver data. The receiver includes one or more first digital-to-analog converters (DACs) (also referred to herein as “average” DACs) shared across the plurality of sub-rate receiver lanes, and one or more second DACs (also referred to herein as “mismatch cancellation” DACs) for each sub-rate receiver lane of the plurality of sub-rate receiver lanes. The one or more second DACs of a respective sub-rate receiver lane provide output to be combined with an output of a corresponding one of the one or more first DACs during processing of the analog receive signal in the respective sub-rate receiver lane to account for a sub-rate receiver lane specific offset with respect to a corresponding one of the one or more first DACs.

Abstract: Presented herein are techniques for implementing a differential sub-sampling phase locked loop (PLL). A method includes detecting a common-mode voltage on an output of a differential sub-sampling phase detector operating in the differential sub-sampling phase locked loop, and controlling, based on the common-mode voltage, a duty cycle of a feedback signal of the differential sub-sampling phase locked loop that is fed back to the differential sub-sampling phase detector.

Abstract: Presented herein are techniques for implementing a differential sub-sampling phase locked loop (PLL). A method includes detecting a common-mode voltage on an output of a differential sub-sampling phase detector operating in the differential sub-sampling phase locked loop, and controlling, based on the common-mode voltage, a duty cycle of a feedback signal of the differential sub-sampling phase locked loop that is fed back to the differential sub-sampling phase detector.

Abstract: A method to determine the throughput speed v of a pore, comprising the steps of feeding, by means of a driving force F, a filiform calibration element through the pore, the calibration element having a plurality of markers spaced apart by known distances and configured to produce an interaction event that transmits a signal away from the pore upon interaction with the pore, detecting a plurality of interaction events, and determining a time interval ?t between successive interaction events, and/or a frequency ? of interaction events.

Abstract: An accurate replica oscillator-based frequency tracking loop (FTL) is provided. The replica oscillator used in the FTL can be at a lower frequency and therefore can consume much lower power compared to a main oscillator, such as an injection locked oscillator (ILO). The proposed FTL accurately sets the free running frequency of an ILO across process, voltage and temperature (PVT). Techniques are also provided to compensate the gain and offset error between the replica oscillator and the ILO.

Abstract: A receiver is provided that includes a plurality of sub-rate receiver lanes each of which is configured to receive an analog receive signal from an analog front-end and produce digital sub-rate receiver data. The receiver includes one or more first digital-to-analog converters (DACs) (also referred to herein as “average” DACs) shared across the plurality of sub-rate receiver lanes, and one or more second DACs (also referred to herein as “mismatch cancellation” DACs) for each sub-rate receiver lane of the plurality of sub-rate receiver lanes. The one or more second DACs of a respective sub-rate receiver lane provide output to be combined with an output of a corresponding one of the one or more first DACs during processing of the analog receive signal in the respective sub-rate receiver lane to account for a sub-rate receiver lane specific offset with respect to a corresponding one of the one or more first DACs.

Abstract: An accurate replica oscillator-based frequency tracking loop (FTL) is provided. The replica oscillator used in the FTL can be at a lower frequency and therefore can consume much lower power compared to a main oscillator, such as an injection locked oscillator (ILO). The proposed FTL accurately sets the free running frequency of an ILO across process, voltage and temperature (PVT). Techniques are also provided to compensate the gain and offset error between the replica oscillator and the ILO.

Abstract: Traveling-wave tube amplifiers and methods for making slow-wave structures for the amplifiers are provided. The SWSs include helical conductors that are self-assembled via the release of stressed electrically conductive strips from a sacrificial material. The helical conductors can be electroplated post-self-assembly to fortify the helix, reduce losses, and tailor the dimensions and operating parameters of the helix.

Abstract: A multi-port coupled inductor with interference suppression is provided with a first signal port connected to a first resistor port via a first inductor; a second resistor port connected to the first resistor port via a second inductor; a second signal port connected to the second resistor port via a third inductor; a third resistor port connected to the first resistor port via a first resistor; a fourth resistor port connected to the third resistor port via a fourth inductor and to the second resistor port via a second resistor; a third signal port connected to the third resistor port via a fifth inductor; and a fourth signal port connected to the fourth resistor port via a sixth inductor.

Abstract: A multi-port coupled inductor with interference suppression is provided with a first signal port connected to a first resistor port via a first inductor; a second resistor port connected to the first resistor port via a second inductor; a second signal port connected to the second resistor port via a third inductor; a third resistor port connected to the first resistor port via a first resistor; a fourth resistor port connected to the third resistor port via a fourth inductor and to the second resistor port via a second resistor; a third signal port connected to the third resistor port via a fifth inductor; and a fourth signal port connected to the fourth resistor port via a sixth inductor.

Abstract: A clock generator includes a first phase-locked loop (PLL), a converter circuit, and a second PLL. The first PLL generates an oscillating signal based on a reference signal and outputs a noise signal indicating a noise component of the oscillating signal. The converter circuit produces an electrical signal based on the noise signal. The second PLL receives the electrical signal from the converter circuit at a loop filter of the second PLL and generates a clock signal based on the oscillating signal and the electrical signal.

Abstract: An accurate replica oscillator-based frequency tracking loop (FTL) is provided. The replica oscillator used in the FTL can be at a lower frequency and therefore can consume much lower power compared to a main oscillator, such as an injection locked oscillator (ILO). The proposed FTL accurately sets the free running frequency of an ILO across process, voltage and temperature (PVT). Techniques are also provided to compensate the gain and offset error between the replica oscillator and the ILO.

Abstract: Traveling-wave tube amplifiers for high-frequency signals, including terahertz signals, and methods for making a slow-wave structure for the traveling-wave tube amplifiers are provided. The slow-wave structures include helical conductors that are self-assembled via the release and relaxation of strained films from a sacrificial growth substrate.

Abstract: A voltage controlled oscillator (VCO) is described. The VCO includes a plurality of nodes coupled with a plurality of transistors, and a first inductor-capacitor (LC) tank coupled with a second LC tank. The first LC tank and the second LC tank include a shared inductor structure coupled to the plurality of nodes. The first LC tank and the second LC tank each include a capacitor. The capacitors are each coupled on a first side to a node of the plurality of nodes and on a second side to a respective capacitor in the other LC tank. The first LC tank and the second LC tank are configured to resonate at a fundamental frequency for differential-mode signals, and the first LC tank and the second LC tank are configured to resonate at twice the fundamental frequency for common-mode signals.

Abstract: Traveling-wave tube amplifiers for high-frequency signals, including terahertz signals, and methods for making a slow-wave structure for the traveling-wave tube amplifiers are provided. The slow-wave structures include helical conductors that are self-assembled via the release and relaxation of strained films from a sacrificial growth substrate.

Abstract: Piezoelectrically actuated devices constructed from thin semiconductor membranes bonded directly to piezoelectric substrates are provided. Methods for fabricating these devices are also provided. The bonding of the semiconductor to the piezoelectric material does not require the use of any intermediate layers, such as bonding agents.

Abstract: Traveling-wave tube amplifiers and methods for making slow-wave structures for the amplifiers are provided. The SWSs include helical conductors that are self-assembled via the release of stressed electrically conductive strips from a sacrificial material. The helical conductors can be electroplated post-self-assembly to fortify the helix, reduce losses, and tailor the dimensions and operating parameters of the helix.