Patents by Inventor Abhishek Das

Abhishek Das has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240095791
    Abstract: Disclosed is a method, performed by an electronic device, for autonomous reconciliation of invoice data. The method comprises obtaining an invoice data set. The method comprises determining, based on the invoice data set and an entity extraction model, an entity extraction set comprising an entity parameter and a first value parameter. The first value parameter is associated with a first confidence score parameter. The method comprises outputting, based on the entity extraction set, an information extraction result for reconciliation of invoice data.
    Type: Application
    Filed: January 28, 2022
    Publication date: March 21, 2024
    Inventors: Abhishek SANWALIYA, Sunil Kumar CHINNAMGARI, Aadil Ahmad MALIK, Mrittunjoy DAS
  • Publication number: 20240073290
    Abstract: A validating service of a plurality of services that compose an application receives a security token that identifies an entity that has submitted a transaction to the application, the security token indicating that the entity is authorized to submit the transaction to the application. The validating service obtains a transaction identifier that uniquely identifies the transaction. The validating service sends, to a collector service, the transaction identifier and data derived from the security token that identifies the entity. A downstream service receives input data associated with the transaction, the input data including the transaction identifier. The downstream service accesses an information source to obtain information. The downstream service sends, to the collector service, the transaction identifier and metadata about the information.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Inventors: Udayakumar Srinivasan, Dhruv Hemchand Jain, Sarangan Rangachari, Advait Abhay Dixit, Abhishek Das
  • Publication number: 20240012772
    Abstract: A physical layer (PHY) is coupled to a serial, differential link that is to include a number of lanes. The PHY includes a transmitter and a receiver to be coupled to each lane of the number of lanes. The transmitter coupled to each lane is configured to embed a clock with data to be transmitted over the lane, and the PHY periodically issues a blocking link state (BLS) request to cause an agent to enter a BLS to hold off link layer flit transmission for a duration. The PHY utilizes the serial, differential link during the duration for a PHY associated task selected from a group including an in-band reset, an entry into low power state, and an entry into partial width state.
    Type: Application
    Filed: July 5, 2023
    Publication date: January 11, 2024
    Applicant: Intel Corporation
    Inventors: Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers, Darren S. Jue, Arvind A. Kumar, Debendra Das Sharma, Jeffrey C. Swanson, Bahaa Fahim, Vedaraman Geetha, Aaron T. Spink, Fulvio Spagna, Rahul R. Shah, Sitaraman V. Iyer, William Harry Nale, Abhishek Das, Simon P. Johnson, Yuvraj S. Dhillon, Yen-Cheng Liu, Raj K. Ramanujan, Robert A. Maddox, Herbert H. Hum, Ashish Gupta
  • Patent number: 11741030
    Abstract: A physical layer (PHY) is coupled to a serial, differential link that is to include a number of lanes. The PHY includes a transmitter and a receiver to be coupled to each lane of the number of lanes. The transmitter coupled to each lane is configured to embed a clock with data to be transmitted over the lane, and the PHY periodically issues a blocking link state (BLS) request to cause an agent to enter a BLS to hold off link layer flit transmission for a duration. The PHY utilizes the serial, differential link during the duration for a PHY associated task selected from a group including an in-band reset, an entry into low power state, and an entry into partial width state.
    Type: Grant
    Filed: December 25, 2020
    Date of Patent: August 29, 2023
    Assignee: Intel Corporation
    Inventors: Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers, Darren S. Jue, Arvind A. Kumar, Debendra Das Sharma, Jeffrey C. Swanson, Bahaa Fahim, Vedaraman Geetha, Aaron T. Spink, Fulvio Spagna, Rahul R. Shah, Sitaraman V. Iyer, William Harry Nale, Abhishek Das, Simon P. Johnson, Yuvraj S. Dhillon, Yen-Cheng Liu, Raj K. Ramanujan, Robert A. Maddox, Herbert H. Hum, Ashish Gupta
  • Publication number: 20220362351
    Abstract: The invention relates generally to recombinant sialidases, methods and compositions for extending the serum half-life of the recombinant sialidases, and use of the same in the treatment of a sialic acid-related disorder.
    Type: Application
    Filed: July 3, 2020
    Publication date: November 17, 2022
    Inventors: Li Peng, Lizhi Cao, Sandip A. Shelke, Andrew S. Turner, Lihui Xu, Wayne C. Gatlin, James W. Broderick, Karl D. Normington, Sujata B. Nerle, Zakir B. Siddiquee, Abhishek Das
  • Patent number: 11501281
    Abstract: Techniques described herein are directed to, among other things, wireless payment readers configured to transition between multiple different power states. In some instances, these power states include one or more relatively low-power states such that an overall battery life of the wireless payment readers are lengthened. Further, in some instances, a point-of-sale (POS) application operating on a POS device that wirelessly couples to an example wireless payment reader may cause the wireless payment reader to transition from one state to another, such as from a first, lower-power state to a second, higher-power state in response to the POS application determining that a payment is to be processed using the wireless payment reader.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: November 15, 2022
    Assignee: Block, Inc.
    Inventors: Matthew Maibach, Abhishek Das, Yujia Zhang, Alice Wang, Eldon Rivers, Hayford Peprah, Edward Tan, Stefan Filipek, Oscar Reparaz
  • Publication number: 20220114122
    Abstract: A physical layer (PHY) is coupled to a serial, differential link that is to include a number of lanes. The PHY includes a transmitter and a receiver to be coupled to each lane of the number of lanes. The transmitter coupled to each lane is configured to embed a clock with data to be transmitted over the lane, and the PHY periodically issues a blocking link state (BLS) request to cause an agent to enter a BLS to hold off link layer flit transmission for a duration. The PHY utilizes the serial, differential link during the duration for a PHY associated task selected from a group including an in-band reset, an entry into low power state, and an entry into partial width state.
    Type: Application
    Filed: December 20, 2021
    Publication date: April 14, 2022
    Applicant: Intel Corporation
    Inventors: Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers, Darren S. Jue, Arvind A. Kumar, Debendra Das Sharma, Jeffrey C. Swanson, Bahaa Fahim, Vedaraman Geetha, Aaron T. Spink, Fulvio Spagna, Rahul R. Shah, Sitaraman V. Iyer, William Harry Nale, Abhishek Das, Simon P. Johnson, Yuvraj S. Dhillon, Yen-Cheng Liu, Raj K. Ramanujan, Robert A. Maddox, Herbert H. Hum, Ashish Gupta
  • Patent number: 11269793
    Abstract: A physical layer (PHY) is coupled to a serial, differential link that is to include a number of lanes. The PHY includes a transmitter and a receiver to be coupled to each lane of the number of lanes. The transmitter coupled to each lane is configured to embed a clock with data to be transmitted over the lane, and the PHY periodically issues a blocking link state (BLS) request to cause an agent to enter a BLS to hold off link layer flit transmission for a duration. The PHY utilizes the serial, differential link during the duration for a PHY associated task selected from a group including an in-band reset, an entry into low power state, and an entry into partial width state.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: March 8, 2022
    Assignee: Intel Corporation
    Inventors: Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers, Darren S. Jue, Arvind A. Kumar, Debendra Das Sharma, Jeffrey C. Swanson, Bahaa Fahim, Vedaraman Geetha, Aaron T. Spink, Fulvio Spagna, Rahul R. Shah, Sitaraman V. Iyer, William Harry Nale, Abhishek Das, Simon P. Johnson, Yuvraj S. Dhillon, Yen-Cheng Liu, Raj K. Ramanujan, Robert A. Maddox, Herbert H. Hum, Ashish Gupta
  • Publication number: 20220051179
    Abstract: Disclosed herein is a system and method of identifying products on a retail shelf using a feature extractor trained to extract features from images of products on the shelf and output identifying information regarding the product in the product image. The extracted features are compared to extracted features in a feature gallery library and a best fit match is obtained. A product ID is then assigned to the image of the product and the assigned product ID is validated by matching the product ID with product identifying information extracted from a shelf label associated with the image of the product.
    Type: Application
    Filed: October 20, 2021
    Publication date: February 17, 2022
    Inventors: Marios SAVVIDES, Uzair AHMED, Sreena NALLAMOTHU, Magesh KANNAN, Abhishek DAS
  • Publication number: 20210117350
    Abstract: A physical layer (PHY) is coupled to a serial, differential link that is to include a number of lanes. The PHY includes a transmitter and a receiver to be coupled to each lane of the number of lanes. The transmitter coupled to each lane is configured to embed a clock with data to be transmitted over the lane, and the PHY periodically issues a blocking link state (BLS) request to cause an agent to enter a BLS to hold off link layer flit transmission for a duration. The PHY utilizes the serial, differential link during the duration for a PHY associated task selected from a group including an in-band reset, an entry into low power state, and an entry into partial width state.
    Type: Application
    Filed: December 25, 2020
    Publication date: April 22, 2021
    Applicant: Intel Corporation
    Inventors: Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers, Darren S. Jue, Arvind A. Kumar, Debendra Das Sharma, Jeffrey C. Swanson, Bahaa Fahim, Vedaraman Geetha, Aaron T. Spink, Fulvio Spagna, Rahul R. Shah, Sitaraman V. Iyer, William Harry Nale, Abhishek Das, Simon P. Johnson, Yuvraj S. Dhillon, Yen-Cheng Liu, Raj K. Ramanujan, Robert A. Maddox, Herbert H. Hum, Ashish Gupta
  • Patent number: 10929244
    Abstract: Systems and methods for backing up and restoring virtual machines in a cluster environment. Proxy nodes in the cluster are configured with agents. The agents are configured to perform backup operations and restore operations for virtual machines operating in the cluster. During a backup operation or during a restore operation, a load associated with the backup/restore operation is distributed across at least some of the proxy nodes. The proxy nodes can backup/restore virtual machines on any of the nodes in the cluster.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: February 23, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Koteswara R. Boda, Abhishek Das, Matthew D. Buchman
  • Publication number: 20200356502
    Abstract: A physical layer (PHY) is coupled to a serial, differential link that is to include a number of lanes. The PHY includes a transmitter and a receiver to be coupled to each lane of the number of lanes. The transmitter coupled to each lane is configured to embed a clock with data to be transmitted over the lane, and the PHY periodically issues a blocking link state (BLS) request to cause an agent to enter a BLS to hold off link layer flit transmission for a duration.
    Type: Application
    Filed: July 23, 2020
    Publication date: November 12, 2020
    Applicant: Intel Corporation
    Inventors: Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers, Darren S. Jue, Arvind A. Kumar, Debendra Das Sharma, Jeffrey C. Swanson, Bahaa Fahim, Vedaraman Geetha, Aaron T. Spink, Fulvio Spagna, Rahul R. Shah, Sitaraman V. Iyer, William Harry Nale, Abhishek Das, Simon P. Johnson, Yuvraj S. Dhillon, Yen-Cheng Liu, Raj K. Ramanujan, Robert A. Maddox, Herbert H. Hum, Ashish Gupta
  • Publication number: 20200117548
    Abstract: Systems and methods for backing up and restoring virtual machines in a cluster environment. Proxy nodes in the cluster are configured with agents. The agents are configured to perform backup operations and restore operations for virtual machines operating in the cluster. During a backup operation or during a restore operation, a load associated with the backup/restore operation is distributed across at least some of the proxy nodes. The proxy nodes can backup/restore virtual machines on any of the nodes in the cluster.
    Type: Application
    Filed: December 9, 2019
    Publication date: April 16, 2020
    Inventors: Koteswara R. Boda, Abhishek Das, Matthew D. Buchman
  • Patent number: 10528430
    Abstract: Systems and methods for backing up and restoring virtual machines in a cluster environment. Proxy nodes in the cluster are configured with agents. The agents are configured to perform backup operations and restore operations for virtual machines operating in the cluster. During a backup operation or during a restore operation, a load associated with the backup/restore operation is distributed across at least some of the proxy nodes. The proxy nodes can backup/restore virtual machines on any of the nodes in the cluster.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: January 7, 2020
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Koteswara R. Boda, Abhishek Das, Matthew D. Buchman
  • Publication number: 20190391939
    Abstract: A physical layer (PHY) is coupled to a serial, differential link that is to include a number of lanes. The PHY includes a transmitter and a receiver to be coupled to each lane of the number of lanes. The transmitter coupled to each lane is configured to embed a clock with data to be transmitted over the lane, and the PHY periodically issues a blocking link state (BLS) request to cause an agent to enter a BLS to hold off link layer flit transmission for a duration.
    Type: Application
    Filed: February 25, 2019
    Publication date: December 26, 2019
    Applicant: Intel Corporation
    Inventors: Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers, Darren S. Jue, Arvind A. Kumar, Debendra Das Sharma, Jeffrey C. Swanson, Bahaa Fahim, Vedaraman Geetha, Aaron T. Spink, Fulvio Spagna, Rahul R. Shah, Sitaraman V. Iyer, William Harry Nale, Abhishek Das, Simon P. Johnson, Yuvraj S. Dhillon, Yen-Cheng Liu, Raj K. Ramanujan, Robert A. Maddox, Herbert H. Hum, Ashish Gupta
  • Publication number: 20190155948
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, re-ranking resources for categorical queries. In one aspect, a method includes receiving queries, and for each received query: receiving data indicating resources identified by a search operation as being responsive to the query and ranked according to a first order, each resource having corresponding search score by which the resources are ranked in responsiveness to the query and determining whether a proper subset meets a quality condition based on a quality measure that is indicative of the quality of the resources in the proper subset and independent of search scores of the resources for received query. For each query for which the proper subset meets the quality condition, determining a quality score for each resource in the proper subset and re-ranking the resources in the proper subset according to their respective quality scores.
    Type: Application
    Filed: March 31, 2015
    Publication date: May 23, 2019
    Inventors: Trystan G. Upstill, Abhishek Das, Jeongwoo Ko, Neesha Subramaniam, Vishnu P. Natchu
  • Patent number: 10248591
    Abstract: A physical layer (PHY) is coupled to a serial, differential link that is to include a number of lanes. The PHY includes a transmitter and a receiver to be coupled to each lane of the number of lanes. The transmitter coupled to each lane is configured to embed a clock with data to be transmitted over the lane, and the PHY periodically issues a blocking link state (BLS) request to cause an agent to enter a BLS to hold off link layer flit transmission for a duration. The PHY utilizes the serial, differential link during the duration for a PHY associated task selected from a group including an in-band reset, an entry into low power state, and an entry into partial width state.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: April 2, 2019
    Assignee: Intel Corporation
    Inventors: Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert H. Beers, Darren S. Jue, Arvind A. Kumar, Debendra Das Sharma, Jeffrey C. Swanson, Bahaa Fahim, Vedaraman Geetha, Aaron T. Spink, Fulvio Spagna, Rahul R. Shah, Sitaraman V. Iyer, William Harry Nale, Abhishek Das, Simon P. Johnson, Yuvraj S. Dhillon, Yen-Cheng Liu, Raj K. Ramanujan, Robert A. Maddox, Herbert H. Hum, Ashish Gupta
  • Publication number: 20180373599
    Abstract: Systems and methods for backing up and restoring virtual machines in a cluster environment. Proxy nodes in the cluster are configured with agents. The agents are configured to perform backup operations and restore operations for virtual machines operating in the cluster. During a backup operation or during a restore operation, a load associated with the backup/restore operation is distributed across at least some of the proxy nodes. The proxy nodes can backup/restore virtual machines on any of the nodes in the cluster.
    Type: Application
    Filed: August 14, 2018
    Publication date: December 27, 2018
    Inventors: Koteswara R. Boda, Abhishek Das, Matthew D. Buchman
  • Patent number: 10055306
    Abstract: Systems and methods for backing up and restoring virtual machines in a cluster environment. Proxy nodes in the cluster are configured with agents. The agents are configured to perform backup operations and restore operations for virtual machines operating in the cluster. During a backup operation or during a restore operation, a load associated with the backup/restore operation is distributed across at least some of the proxy nodes. The proxy nodes can backup/restore virtual machines on any of the nodes in the cluster.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: August 21, 2018
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Koteswara R. Boda, Abhishek Das, Matthew D. Buchman
  • Patent number: 9729309
    Abstract: Embodiments of an invention for securing transmissions between processor packages are disclosed. In one embodiment, an apparatus includes an encryption unit to encrypt first content to be transmitted from the apparatus to a processor package directly through a point-to-point link.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: August 8, 2017
    Assignee: Intel Corporation
    Inventors: Simon Johnson, Abhishek Das, Carlos Rozas, Uday Savagaonkar, Robert Blankenship, Kiran Padwekar