Abstract: A computing system may comprise a processor and a memory having a routing program, the processor being configured to receive a first request having a data record with a unique subscriber identifier, extract the unique subscriber identifier from the first request, and compare a tag of a database table with the unique subscriber identifier. If the tag does not match the unique subscriber identifier, the processor may be configured to process the first request as part of a general test environment. If the tag matches the unique subscriber identifier, the processor may be configured to route the first request to a live test environment associated with the tag.

Abstract: A flexible circuit assembly can include a base layer, a plurality of circuit traces and an insulative layer. The plurality of circuit traces can each be coupled to a pair of circuit pads, and the circuit traces can be formed on an upper side of the base layer. The insulative layer can be formed over the circuit traces to isolate the circuit traces from an external environment. The base layer, plurality of circuit traces and insulative layer can form a flexible circuit sheet. The base layer and the insulative layer can include material properties and a thickness configured to facilitate the flexible circuit sheet being flexible such that the flexible circuit sheet is adapted to conform to a non-planar surface of the medical device.

Abstract: A surgical instrument is disclosed having an elongated body portion having a proximal end and a distal end. The body portion is formed from a plastically deformable material such that the body portion can be bent between the proximal and distal ends from a first configuration to a second bent configuration and maintains the bent configuration. A flexible circuit having at least a pair of lead wires disposed around the body portion. The pair of lead wires are configured to conform to the bent configuration of the body portion such that they do not break during bending of the body portion. A tracking device adapted to cooperate with a navigation system to track the distal end of the instrument is coupled to the flexible circuit.

Abstract: Disclosed is a system and method for providing a critical path replica system in a circuit. A critical path replica system is created by determining a critical path in a circuit, generating a critical path replica circuit, generating a circuit blueprint, and creating the blueprinted circuit. The circuit comprises a functional logic module having functional logic elements and replica logic modules having logic elements. Each logic element is configured to replicate one or more of the functional logic elements and process a test signal. A replica error detection module analyzes the processed signal to determine whether a timing violation has occurred. In some embodiments, the replica logic module further comprises one or more load modules. A replica controller may modify operation of the circuit based on reported errors. A replica mode select module sets the replica logic module to an aging test mode or a timing sensor mode.

Abstract: One or more techniques and/or systems are provided for load balancing between storage controllers. For example, a first storage controller and a second storage controller may be configured at a first storage site according to a high availability configuration, and may be configured as disaster recovery partners for a third storage controller and a fourth storage controller at a second storage site. If the first storage controller fails, the second storage controller provides failover operation for a first storage device. If a disaster occurs at the second storage site, the second storage controller provides switchover operation for a third storage device and a fourth storage device. Responsive to the first storage controller being restored, the third storage device may be reassigned from the second storage controller to the first storage controller for load balancing at the first storage site during disaster recovery of the second storage site.

Abstract: An embodiment of a circuit includes a data latch and a plurality of cascaded latches, wherein a first of the plurality of cascaded latches is configured to receive a first signal from the data latch and each subsequent cascaded latch is configured to receive a data output signal of a preceding cascaded latch, and an error-detection circuit configured to receive the respective data output signals and detect error in operation of the cascaded latches based thereon.

Abstract: According to an embodiment described herein, a method for testing a memory includes receiving an address and a start signal at a memory, and generating a first detector pulse at a test circuit in response to the start signal. The first detector pulse has a leading edge and a trailing edge. A data transition of a bit associated with the address is detected. The bit is a functional bit. The method further includes determining whether the bit is a weak bit by determining whether the data transition occurred after the trailing edge.

Abstract: An embodiment of a circuit includes a data latch and a plurality of cascaded latches, wherein a first of the plurality of cascaded latches is configured to receive a first signal from the data latch and each subsequent cascaded latch is configured to receive a data output signal of a preceding cascaded latch, and an error-detection circuit configured to receive the respective data output signals and detect error in operation of the cascaded latches based thereon.

Abstract: A surgical instrument can include a body, a tracking device, and a handle. The tracking device can be positioned adjacent the distal end for tracking a distal tip of the instrument. The tracking device can include a pair of lead traces defined on a tubular flex circuit around the body to the handle, where the traces define at least on coil configured to communicate with a navigation system.

Abstract: Disclosed is a system and method for providing a critical path replica system in a circuit. A critical path replica system is created by determining a critical path in a circuit, generating a critical path replica circuit, generating a circuit blueprint, and creating the blueprinted circuit. The circuit comprises a functional logic module having functional logic elements and replica logic modules having logic elements. Each logic element is configured to replicate one or more of the functional logic elements and process a test signal. A replica error detection module analyzes the processed signal to determine whether a timing violation has occurred. In some embodiments, the replica logic module further comprises one or more load modules. A replica controller may modify operation of the circuit based on reported errors. A replica mode select module sets the replica logic module to an aging test mode or a timing sensor mode.

Abstract: A surgical instrument is disclosed having an elongated body portion having a proximal end and a distal end. The body portion is formed from a plastically deformable material such that the body portion can be bent between the proximal and distal ends from a first configuration to a second bent configuration and maintains the bent configuration. A flexible circuit having at least a pair of lead wires disposed around the body portion. The pair of lead wires are configured to conform to the bent configuration of the body portion such that they do not break during bending of the body portion. A tracking device adapted to cooperate with a navigation system to track the distal end of the instrument is coupled to the flexible circuit.

Abstract: The present disclosure relates to a low consumption flip-flop circuit with data retention, comprising at least one flip-flop and at least one retention cell connected to the output of the flip-flop and configured so that during normal operation of the flip-flop circuit, the retention cell transmits the data or logic state present on the output terminal of the flip-flop to its own output terminal, while during low consumption operation of the flip-flop circuit a latch circuit of the retention cell suitable to memorize data or a logic state corresponding to the last data or logic state present on the output terminal of the flip-flop is activated.

Abstract: An embodiment of a circuit includes a data latch and a plurality of cascaded latches, wherein a first of the plurality of cascaded latches is configured to receive a first signal from the data latch and each subsequent cascaded latch is configured to receive a data output signal of a preceding cascaded latch, and an error-detection circuit configured to receive the respective data output signals and detect error in operation of the cascaded latches based thereon.

Abstract: This method for analysing the sounds of body fluid flows includes:—simultaneously acquiring (2) sounds from various locations of a body;—identifying (6) the points of maximum sound intensity (PMIs) of the acquired sounds for each acquisition instant;—determining (10) the source locations of the acquired sounds; and—determining (12, 14) the sound radiation patterns of the acquired sounds. A corresponding device, system and program perform this method.

Abstract: An embodiment of a detector includes first and second generators. The first generator is operable to receive a transition of a first signal and to generate in response to the transition a first pulse having a length that is approximately equal to a length of a detection window. And the second generator is operable to receive a second signal and to generate a second pulse having a relationship to the first pulse in response to a transition of the second signal occurring approximately during the detection window.

Abstract: The present disclosure relates to a low consumption flip-flop circuit with data retention, comprising at least one flip-flop and at least one retention cell connected to the output of the flip-flop and configured so that during normal operation of the flip-flop circuit, the retention cell transmits the data or logic state present on the output terminal of the flip-flop to its own output terminal, while during low consumption operation of the flip-flop circuit a latch circuit of the retention cell suitable to memorize data or a logic state corresponding to the last data or logic state present on the output terminal of the flip-flop is activated.

Abstract: A multi-threshold complementary metal-oxide semiconductor technology (MTCMOS technology) master slave flip-flop with a single clock signal includes a master storage element configured to store an input data in response to a clock signal transition and a slave storage element configured to receive data from the master storage element and to output the received data in response to an opposite clock signal transition. The master storage element includes low threshold voltage transistors, the slave storage element includes high threshold voltage transistors, and the master and the slave storage elements are provided with a single clock signal.

Abstract: An apparatus (200) for diagnosing asthma is disclosed. The apparatus (200) comprises a data acquisition module (210) configured to acquire at least one physical deformation feature associated with at least one of nasal flaring, neck retraction and inter-coastal retraction of a subject under examination and an analysis module (220) configured to analyze the acquired at least one physical deformation feature associated with at least one of the nasal flaring, the neck retraction and the inter-coastal retraction of the subject under examination and diagnose the asthma based on the analyzed at least one physical deformation feature associated with at least one of the nasal flaring, the neck retraction and the inter-coastal retraction of the subject under examination. The disclosed apparatus (200) can be used for monitoring asthma at home, at hospital or in ambulatory patients.

Abstract: A multi-threshold complementary metal-oxide semiconductor technology (MTCMOS technology) master slave flip-flop with a single clock signal includes a master storage element configured to store an input data in response to a clock signal transition and a slave storage element configured to receive data from the master storage element and to output the received data in response to an opposite clock signal transition. The master storage element includes low threshold voltage transistors, the slave storage element includes high threshold voltage transistors, and the master and the slave storage elements are provided with a single clock signal.

Abstract: The present disclosure relates to a low consumption flip-flop circuit with data retention, comprising at least one flip-flop and at least one retention cell connected to the output of the flip-flop and configured so that during normal operation of the flip-flop circuit, the retention cell transmits the data or logic state present on the output terminal of the flip-flop to its own output terminal, while during low consumption operation of the flip-flop circuit a latch circuit of the retention cell suitable to memorize data or a logic state corresponding to the last data or logic state present on the output terminal of the flip-flop is activated.