Patents by Inventor Abid Hussain
Abid Hussain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230281367Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.Type: ApplicationFiled: May 8, 2023Publication date: September 7, 2023Inventors: Calum MacRae, Jim LoCascio, Karen Mason, John Mason, Richard Philpott, Muhammed Abid Hussain
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Patent number: 11354472Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.Type: GrantFiled: May 28, 2020Date of Patent: June 7, 2022Assignee: CELERA INC.Inventors: Calum MacRae, Jim LoCascio, Karen Mason, John Mason, Richard Philpott, Muhammed Abid Hussain
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Patent number: 11304901Abstract: The present invention is directed to a liposomal formulation having a lipid ingredient encapsulating fluticasone furoate, and a method for preparing the liposomal formulation. The liposome formulation comprises a lipid and a sterol. The method of preparing the liposomes comprises the steps of (1) mixing fluticasone furoate with lipid ingredients comprising a lipid and a sterol, (2) injecting the mixture into normal saline solution, and (3) ultrafiltering and concentrating the resulting solution. This preparation method can produce a liposome formulation having desirable properties and compositions, for example, the ratio of the lipid ingredient, the drug to lipid ratio, and the pH value, which is suitable for nebulization inhalation.Type: GrantFiled: August 25, 2020Date of Patent: April 19, 2022Assignee: ANOVENT PHARMACEUTICAL (U.S.), LLCInventors: Cai Gu Huang, Hailong Zhang, Abid Hussain
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Patent number: 11250162Abstract: Methods, systems and computer program products for layered masking of data are described. A system receives content including personally identifiable information (PII). The system redacts the content by masking the PII. The system identifies the PII in multi-layer processing, where in each layer, the system determines a respective confidence score indicating a probability that a token is PII. If the confidence score is sufficiently high, the system masks the token. Otherwise, the system provides the token to a next layer for processing. The layers can include regular expression based processing, lookup table based processing, and machine learning based processing.Type: GrantFiled: December 23, 2019Date of Patent: February 15, 2022Assignee: Yodlee, Inc.Inventors: Vunnava Praveen, Syed Abid Hussain
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Publication number: 20210401855Abstract: The present invention relates to a pharmaceutical formulation and a method for administering the pharmaceutical formulation by nebulizing the pharmaceutical formulation with an inhaler. The propellant-free pharmaceutical formulation comprises: batefenterol or a pharmaceutically acceptable salt thereof, fluticasone furoate, and a pH adjusting agent.Type: ApplicationFiled: June 29, 2021Publication date: December 30, 2021Inventors: Cai Gu Huang, Abid Hussain
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Publication number: 20210353650Abstract: The invention provides a pharmaceutical composition for dry powder inhalation and a preparation method thereof, wherein the composition comprises, a carrier material, preferably lactose and micronized remdesivir and/or its active metabolites (such as Alanine metabolite (Ala-met), Nucleoside monophosphate, and Nucleoside Triphosphate (NTP)) and/or its analog GS-441524 and pharmaceutically acceptable salts thereof. The active pharmaceutical ingredient may be an anti-viral, taken as remdesivir and/or its active metabolites (such as Alanine metabolite (Ala-met), Nucleoside monophosphate. and Nucleoside Triphosphate (NTP)) and/or its analog GS-441524. The dry powder inhalation containing Remdesivir and/or its active metabolites and/or its analog GS-441524 as active ingredients, further consisting of a breath-powered, dry powder inhaler, and a cartridge for delivering a dry powder formulation deep into the lungs for the treatment of respiratory disorders.Type: ApplicationFiled: May 18, 2021Publication date: November 18, 2021Inventors: Cai Gu Huang, Abid Hussain
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Publication number: 20210059937Abstract: The present invention is directed to a liposomal formulation having a lipid ingredient encapsulating fluticasone furoate, and a method for preparing the liposomal formulation. The liposome formulation comprises a lipid and a sterol. The method of preparing the liposomes comprises the steps of (1) mixing fluticasone furoate with lipid ingredients comprising a lipid and a sterol, (2) injecting the mixture into normal saline solution, and (3) ultrafiltering and concentrating the resulting solution. This preparation method can produce a liposome formulation having desirable properties and compositions, for example, the ratio of the lipid ingredient, the drug to lipid ratio, and the pH value, which is suitable for nebulization inhalation.Type: ApplicationFiled: August 25, 2020Publication date: March 4, 2021Inventors: Cai Gu Huang, Hailong Zhang, Abid Hussain
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Patent number: 10901844Abstract: A distributed storage system can use a high rate MSR erasure code to repair multiple nodes when multiple node failures occur. An encoder constructs m r-ary trees to determine the symbol arrays for the parity nodes. These symbol arrays are used to generate the parity data according to parity definitions or parity equations. The m r-ary trees are also used to identify a set of recovery rows across helper nodes for repairing a systematic node. When failed systematic nodes correspond to different ones of the m r-ary trees, a decoder may select additional recovery rows. The decoder selects additional recovery rows when the parity definitions do not provide a sufficient number of independent linear equations to solve the unknown symbols of the failed nodes. The decoder can select recovery rows contiguous to the already identified recovery rows for access efficiency.Type: GrantFiled: October 11, 2019Date of Patent: January 26, 2021Assignee: NETAPP, INC.Inventors: Syed Abid Hussain, Srinivasan Narayanamurthy
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Publication number: 20200410153Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.Type: ApplicationFiled: May 22, 2020Publication date: December 31, 2020Inventors: Calum MacRae, Jim LoCascio, Karen Mason, John Mason, Richard Philpott, Muhammed Abid Hussain
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Publication number: 20200380191Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.Type: ApplicationFiled: May 28, 2020Publication date: December 3, 2020Inventors: Calum MacRae, Jim LoCascio, Karen Mason, John Mason, Richard Philpott, Muhammed Abid Hussain
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Publication number: 20200380188Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.Type: ApplicationFiled: May 28, 2020Publication date: December 3, 2020Inventors: Calum MacRae, Jim LoCascio, Karen Mason, John Mason, Richard Philpott, Muhammed Abid Hussain
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Publication number: 20200380192Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.Type: ApplicationFiled: May 28, 2020Publication date: December 3, 2020Inventors: Calum MacRae, Jim LoCascio, Karen Mason, John Mason, Richard Philpott, Muhammed Abid Hussain
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Publication number: 20200134231Abstract: Methods, systems and computer program products for layered masking of data are described. A system receives content including personally identifiable information (PII). The system redacts the content by masking the PII. The system identifies the PII in multi-layer processing, where in each layer, the system determines a respective confidence score indicating a probability that a token is PII. If the confidence score is sufficiently high, the system masks the token. Otherwise, the system provides the token to a next layer for processing. The layers can include regular expression based processing, lookup table based processing, and machine learning based processing.Type: ApplicationFiled: December 23, 2019Publication date: April 30, 2020Inventors: Vunnava Praveen, Syed Abid Hussain
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Publication number: 20200117542Abstract: A distributed storage system can use a high rate MSR erasure code to repair multiple nodes when multiple node failures occur. An encoder constructs m r-ary trees to determine the symbol arrays for the parity nodes. These symbol arrays are used to generate the parity data according to parity definitions or parity equations. The m r-ary trees are also used to identify a set of recovery rows across helper nodes for repairing a systematic node. When failed systematic nodes correspond to different ones of the m r-ary trees, a decoder may select additional recovery rows. The decoder selects additional recovery rows when the parity definitions do not provide a sufficient number of independent linear equations to solve the unknown symbols of the failed nodes. The decoder can select recovery rows contiguous to the already identified recovery rows for access efficiency.Type: ApplicationFiled: October 11, 2019Publication date: April 16, 2020Inventors: Syed Abid Hussain, Srinivasan Narayanamurthy
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Patent number: 10546154Abstract: Methods, systems and computer program products for layered masking of data are described. A system receives content including personally identifiable information (PII). The system redacts the content by masking the PII. The system identifies the PII in multi-layer processing, where in each layer, the system determines a respective confidence score indicating a probability that a token is PII. If the confidence score is sufficiently high, the system masks the token. Otherwise, the system provides the token to a next layer for processing. The layers can include regular expression based processing, lookup table based processing, and machine learning based processing.Type: GrantFiled: October 27, 2017Date of Patent: January 28, 2020Assignee: Yodlee, Inc.Inventors: Vunnava Praveen, Syed Abid Hussain
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Patent number: 10452477Abstract: A distributed storage system can use a high rate MSR erasure code to repair multiple nodes when multiple node failures occur. An encoder constructs m r-ary trees to determine the symbol arrays for the parity nodes. These symbol arrays are used to generate the parity data according to parity definitions or parity equations. The m r-ary trees are also used to identify a set of recovery rows across helper nodes for repairing a systematic node. When failed systematic nodes correspond to different ones of the m r-ary trees, a decoder may select additional recovery rows. The decoder selects additional recovery rows when the parity definitions do not provide a sufficient number of independent linear equations to solve the unknown symbols of the failed nodes. The decoder can select recovery rows contiguous to the already identified recovery rows for access efficiency.Type: GrantFiled: August 26, 2016Date of Patent: October 22, 2019Assignee: NETAPP, INC.Inventors: Syed Abid Hussain, Srinivasan Narayanamurthy
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Publication number: 20180285599Abstract: Methods, systems and computer program products for layered masking of data are described. A system receives content including personally identifiable information (PII). The system redacts the content by masking the PII. The system identifies the PII in multi-layer processing, where in each layer, the system determines a respective confidence score indicating a probability that a token is PII. If the confidence score is sufficiently high, the system masks the token. Otherwise, the system provides the token to a next layer for processing. The layers can include regular expression based processing, lookup table based processing, and machine learning based processing.Type: ApplicationFiled: October 27, 2017Publication date: October 4, 2018Inventors: Vunnava Praveen, Syed Abid Hussain
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Publication number: 20180060169Abstract: A distributed storage system can use a high rate MSR erasure code to repair multiple nodes when multiple node failures occur. An encoder constructs m r-ary trees to determine the symbol arrays for the parity nodes. These symbol arrays are used to generate the parity data according to parity definitions or parity equations. The m r-ary trees are also used to identify a set of recovery rows across helper nodes for repairing a systematic node. When failed systematic nodes correspond to different ones of the m r-ary trees, a decoder may select additional recovery rows. The decoder selects additional recovery rows when the parity definitions do not provide a sufficient number of independent linear equations to solve the unknown symbols of the failed nodes. The decoder can select recovery rows contiguous to the already identified recovery rows for access efficiency.Type: ApplicationFiled: August 26, 2016Publication date: March 1, 2018Inventors: Syed Abid Hussain, Srinivasan Narayanamurthy
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Publication number: 20180051211Abstract: The present invention describes composite materials presenting an optical, electrical or optoelectronic response to stimuli, respective production method and application as sensitive films for the detection or quantification of a variety of analytes and analyte patterns, including but not limited to volatile organic compounds (VOC), vapors and gases, biomolecules, microorganisms, viruses, cells, and particles, as well as differences of temperature, pressure and electromagnetic fields. The composite material contains a mixture of (i) at least one liquid crystal; (ii) at least one ionic liquid or molecules with surfactant properties; (iii) polymer(s), preferably with natural or synthetic origin; (iv) appropriate solvent(s); optionally (v) a stabilizing element, such as sorbitol; and (vi) an electrolyte, which can be dispensed when the sensitive film is used to obtain an exclusively optical response or when the ionic liquid(s) or surfactant(s) are also conducting materials.Type: ApplicationFiled: February 10, 2016Publication date: February 22, 2018Inventors: Ana Cecilia AFONSO ROQUE, Abid HUSSAIN, Jonas GRUBER, Ana Teresa SILVA SEMEANO
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Publication number: 20170179979Abstract: m r-Ary trees for generating High-Rate MSR (HMSR) erasure codes for application in data storage systems. Nodes in the tree structures represent systematic and parity storage nodes. Each parity symbol for the HMSR erasure codes will be a linear combination of maximum k+k/r systematic symbols. The tree structures show that when a systematic node fails, its original systematic symbols can be recovered by accessing ? symbols for each of its leaf nodes from each of the remaining nodes. Traversing the m r-Ary trees to design a codeword array will provide the linear equations needed to solve for and recover the lost systematic symbols. When forming the linear equations, random number or other coefficients can be added to the systematic symbols to construct the parity symbols. The parities of the HMSR erasure code will ensure recovery of any systematic node failure using significantly reduced IO and network bandwidth.Type: ApplicationFiled: December 18, 2015Publication date: June 22, 2017Inventor: Syed Abid Hussain