Patents by Inventor Abiola A. Awujoola

Abiola A. Awujoola has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240047376
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Application
    Filed: September 21, 2023
    Publication date: February 8, 2024
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Patent number: 11810867
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Grant
    Filed: August 23, 2022
    Date of Patent: November 7, 2023
    Assignee: Invensas LLC
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Publication number: 20230059375
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Application
    Filed: August 23, 2022
    Publication date: February 23, 2023
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Patent number: 11462483
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: October 4, 2022
    Assignee: Invensas LLC
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Publication number: 20210210478
    Abstract: Embodiments disclosed herein include electronic packages for optical to electrical switching. In an embodiment, an electronic package comprises a first package substrate and a second package substrate attached to the first package substrate. In an embodiment, a die is attached to the second package substrate. In an embodiment, a plurality of photonic engines are attached to a first surface and a second surface of the first package substrate. In an embodiment, the plurality of photonic engines are communicatively coupled to the die through the first package substrate and the second package substrate.
    Type: Application
    Filed: March 3, 2021
    Publication date: July 8, 2021
    Inventors: Susheel JADHAV, Juan DOMINGUEZ, Ankur AGRAWAL, Kenneth BROWN, Yi LI, Jing CHEN, Aditi MALLIK, Xiaoyu HONG, Thomas LILJEBERG, Andrew C. ALDUINO, Ling LIAO, David HUI, Ren-Kang CHIOU, Harinadh POTLURI, Hari MAHALINGAM, Lobna KAMYAB, Sasanka KANUPARTHI, Sushrutha Reddy GUJJULA, Saeed FATHOLOLOUMI, Priyanka DOBRIYAL, Boping XIE, Abiola AWUJOOLA, Vladimir TAMARKIN, Keith MEASE, Stephen KEELE, David SCHWEITZER, Brent ROTHERMEL, Ning TANG, Suresh POTHUKUCHI, Srikant NEKKANTY, Zhichao ZHANG, Kaiyuan ZENG, Baikuan WANG, Donald TRAN, Ravindranath MAHAJAN, Baris BICEN, Grant SMITH
  • Publication number: 20200118939
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Application
    Filed: December 16, 2019
    Publication date: April 16, 2020
    Applicant: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Patent number: 10559537
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: February 11, 2020
    Assignee: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Patent number: 10490528
    Abstract: Apparatuses relating generally to a vertically integrated microelectronic package are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface. A first microelectronic device is coupled to the upper surface of the substrate. The first microelectronic device is a passive microelectronic device. First wire bond wires are coupled to and extend away from the upper surface of the substrate. Second wire bond wires are coupled to and extend away from an upper surface of the first microelectronic device. The second wire bond wires are shorter than the first wire bond wires. A second microelectronic device is coupled to upper ends of the first wire bond wires and the second wire bond wires. The second microelectronic device is located above the first microelectronic device and at least partially overlaps the first microelectronic device.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: November 26, 2019
    Assignee: Invensas Corporation
    Inventors: Ashok S. Prabhu, Abiola Awujoola, Wael Zohni, Willmar Subido
  • Patent number: 10325877
    Abstract: In a vertically integrated microelectronic package, a first microelectronic device is coupled to an upper surface of a circuit platform in a wire bond-only surface area thereof. Wire bond wires are coupled to and extends away from an upper surface of the first microelectronic device. A second microelectronic device in a face-down orientation is coupled to upper ends of the wire bond wires in a surface mount-only area. The second microelectronic device is located above and at least partially overlaps the first microelectronic device. A protective layer is disposed over the circuit platform and the first microelectronic device. An upper surface of the protective layer has the surface mount-only area. The upper surface of the protective layer has the second microelectronic device disposed thereon in the face-down orientation in the surface mount-only area for coupling to the upper ends of the first wire bond wires.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: June 18, 2019
    Assignee: Invensas Corporation
    Inventors: Javier A. Delacruz, Abiola Awujoola, Ashok S. Prabhu, Christopher W. Lattin, Zhuowen Sun
  • Publication number: 20190027444
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Application
    Filed: September 10, 2018
    Publication date: January 24, 2019
    Applicant: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Patent number: 10115678
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: October 30, 2018
    Assignee: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Publication number: 20180240773
    Abstract: In a vertically integrated microelectronic package, a first microelectronic device is coupled to an upper surface of a circuit platform in a wire bond-only surface area thereof. Wire bond wires are coupled to and extends away from an upper surface of the first microelectronic device. A second microelectronic device in a face-down orientation is coupled to upper ends of the wire bond wires in a surface mount-only area. The second microelectronic device is located above and at least partially overlaps the first microelectronic device. A protective layer is disposed over the circuit platform and the first microelectronic device. An upper surface of the protective layer has the surface mount-only area. The upper surface of the protective layer has the second microelectronic device disposed thereon in the face-down orientation in the surface mount-only area for coupling to the upper ends of the first wire bond wires.
    Type: Application
    Filed: April 23, 2018
    Publication date: August 23, 2018
    Applicant: Invensas Corporation
    Inventors: Javier A. Delacruz, Abiola Awujoola, Ashok S. Prabhu, Christopher W. Lattin, Zhuowen Sun
  • Patent number: 9984992
    Abstract: In a vertically integrated microelectronic package, a first microelectronic device is coupled to an upper surface of a circuit platform in a wire bond-only surface area thereof. Wire bond wires are coupled to and extends away from an upper surface of the first microelectronic device. A second microelectronic device in a face-down orientation is coupled to upper ends of the wire bond wires in a surface mount-only area. The second microelectronic device is located above and at least partially overlaps the first microelectronic device. A protective layer is disposed over the circuit platform and the first microelectronic device. An upper surface of the protective layer has the surface mount-only area. The upper surface of the protective layer has the second microelectronic device disposed thereon in the face-down orientation in the surface mount-only area for coupling to the upper ends of the first wire bond wires.
    Type: Grant
    Filed: January 18, 2016
    Date of Patent: May 29, 2018
    Assignee: Invensas Corporation
    Inventors: Javier A. DeLaCruz, Abiola Awujoola, Ashok S. Prabhu, Christopher W. Lattin, Zhuowen Sun
  • Publication number: 20180061774
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Application
    Filed: November 6, 2017
    Publication date: March 1, 2018
    Applicant: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Patent number: 9812402
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: November 7, 2017
    Assignee: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Publication number: 20170194281
    Abstract: In a vertically integrated microelectronic package, a first microelectronic device is coupled to an upper surface of a circuit platform in a wire bond-only surface area thereof. Wire bond wires are coupled to and extends away from an upper surface of the first microelectronic device. A second microelectronic device in a face-down orientation is coupled to upper ends of the wire bond wires in a surface mount-only area. The second microelectronic device is located above and at least partially overlaps the first microelectronic device. A protective layer is disposed over the circuit platform and the first microelectronic device. An upper surface of the protective layer has the surface mount-only area. The upper surface of the protective layer has the second microelectronic device disposed thereon in the face-down orientation in the surface mount-only area for coupling to the upper ends of the first wire bond wires.
    Type: Application
    Filed: January 18, 2016
    Publication date: July 6, 2017
    Applicant: Invensas Corporatoin
    Inventors: Javier A. DeLaCruz, Abiola Awujoola, Ashok S. Prabhu, Christopher W. Lattin, Zhuowen Sun
  • Publication number: 20170117231
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Application
    Filed: November 7, 2016
    Publication date: April 27, 2017
    Applicant: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Publication number: 20170103968
    Abstract: Apparatuses relating generally to a vertically integrated microelectronic package are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface. A first microelectronic device is coupled to the upper surface of the substrate. The first microelectronic device is a passive microelectronic device. First wire bond wires are coupled to and extend away from the upper surface of the substrate. Second wire bond wires are coupled to and extend away from an upper surface of the first microelectronic device. The second wire bond wires are shorter than the first wire bond wires. A second microelectronic device is coupled to upper ends of the first wire bond wires and the second wire bond wires. The second microelectronic device is located above the first microelectronic device and at least partially overlaps the first microelectronic device.
    Type: Application
    Filed: January 12, 2016
    Publication date: April 13, 2017
    Applicant: Invensas Corporation
    Inventors: Ashok S. PRABHU, Abiola AWUJOOLA, Wael ZOHNI, Willmar SUBIDO
  • Patent number: 9490222
    Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: November 8, 2016
    Assignee: Invensas Corporation
    Inventors: Abiola Awujoola, Zhuowen Sun, Wael Zohni, Ashok S. Prabhu, Willmar Subido
  • Publication number: 20130161804
    Abstract: Provided, in one embodiment, is an integrated circuit (IC) leadframe. In one example, the leadframe includes a paddle, wherein the paddle has a surface configured to accept an IC chip and has at least one edge. In this example, the leadframe may further include a plurality of lead fingers having ends extending toward the at least one edge, wherein the ends of ones of adjacent lead fingers are staggered proximate and distal the at least one edge.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 27, 2013
    Inventors: Clifford R. Fishley, John J. Krantz, Abiola Awujoola, Allen S. Lim, Stephen M. King, Lawrence W. Golick