Abstract: Systems and methods for measurement of signal power, when the signal is substantially variable or otherwise time varying. A log-linear VGA is coupled in a feedback configuration to a difference-of-squares detector and an integrator. The log-linear VGA includes a set of selectable amplifier cells. A sliding current generator selects one or more amplifier cells, wholly or partially, producing a sum of outputs. Some of the selectable amplifier cells have differential amplification, while others have similar amplification but are differentially attenuated. Switches turn off to isolate amplifier cells when the cell is not selected. Canceling circuits produce an output opposite to unselected amplifier cells, providing a sum near zero. Temperature compensation and other adjustment include two components: when the output y and the input x have the relation y=a+b log x the log-linear VGA can adjust either the offset or slope.

Abstract: A dynamic biasing of a transmitter chip is disclosed. The transmitter chip comprises a variable gain amplifying stage, a biasing stage, a phase shifting stage, and a mixing stage. In response to a voltage control signal and a voltage intermediate frequency signal, the variable gain amplifying stage provides a current drive signal and a DC current control signal. While an ampere level of the DC component of the current drive signal and an ampere level of the DC current control signal vary as a function of any variations in the voltage control signal as well as any variation in the temperature, process performance, and supply power of the transmitter chip, a ratio of the ampere level of a DC component of the current drive signal to the ampere level of the DC current control signal is constant. The current drive signal and the DC current control signal establish the dynamic biasing block in a current mode of operation that maintains a constant gain of the mixing stage.

Abstract: A power mixer architecture for a transmitter chip is disclosed. The power mixer architecture is a mixing stage including one or more upper trees, and one or more lower trees. Each lower tree is selectively activated to receive current biasing signals, and current intermediate frequency signals. Upon receipt, the activated lower tree activates a corresponding upper tree to receive one or more amplified current intermediate frequency signals from the lower tree. In conjunction with a reception of voltage local oscillating signals, the upper tree provides voltage radio frequency signals. The gain of the lower tree is designed to be constant over any variance in a temperature, supply voltage or processing performance of the transmitter chip.

Abstract: According to a particular example application, the present invention is embodied in the form of first and second current-steering sections arranged to steer a differential current input signal. Each of the first and second current-steering sections is current driven via differential current paths. The first current-steering section configured and arranged to source current and thereby drive the second current-steering section. Another aspect of the invention employs stacked Gilbert cells, as described above, to form a variable gain amplifier (“VGA”) circuit that achieves a large dynamic range, a wide frequency response and improved linearity, while consuming relatively low amounts of power.

Abstract: The present invention is directed to advantages discovered in connection with controlling DC current passing between and adversely affecting cascaded current-mode blocks. According to a particular example application, the present invention includes first and second cascaded current-mode circuit blocks, and a circuit-replication and comparison block adapted to replicate the operation and output impedance of the first current-mode circuit block and to replicate the operation and input impedance of the second current-mode circuit block. This replication-comparison block includes a differential comparator adapted to detect and correct for a voltage differential corresponding to current passing from the first current-mode circuit block and the second current-mode circuit block. This approach can result in a number advantages relating to improvements in terms of various operational aspects including, for example, reductions in power consumption.

Abstract: A dynamic biasing of a transmitter chip is disclosed. The transmitter chip comprises a variable gain amplifying stage, a biasing stage, a phase shifting stage, and a mixing stage. In response to a voltage control signal and a voltage intermediate frequency signal, the variable gain amplifying stage provides a current drive signal and a DC current control signal. While an ampere level of the DC component of the current drive signal and an ampere level of the DC current control signal vary as a function of any variations in the voltage control signal as well as any variation in the temperature, process performance, and supply power of the transmitter chip, a ratio of the ampere level of a DC component of the current drive signal to the ampere level of the DC current control signal is constant. The current drive signal and the DC current control signal establish the dynamic biasing block in a current mode of operation that maintains a constant gain of the mixing stage.

Abstract: A power mixer architecture for a transmitter chip is disclosed. The power mixer architecture is a mixing stage including one or more upper trees, and one or more lower trees. Each lower tree is selectively activated to receive current biasing signals, and current intermediate frequency signals. Upon receipt, the activated lower tree activates a corresponding upper tree to receive one or more amplified current intermediate frequency signals from the lower tree. In conjunction with a reception of voltage local oscillating signals, the upper tree provides voltage radio frequency signals. The gain of the lower tree is designed to be constant over any variance in a temperature, supply voltage or processing performance of the transmitter chip.