Patents by Inventor Abraham Ziv

Abraham Ziv has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8965944
    Abstract: Methods, apparatus and systems are disclosed for the generation of range-constrained test cases for verification of designs of arithmetic floating point units. Given three ranges of floating point numbers Rx, Ry, Rz, a floating point operation (op), and a rounding-mode (round), three floating point numbers x, y, z are generated such that x?Rx, y?Ry, z?Rz, and z=round ( x op y). Solutions are provided for add and subtract operations. Range constraints are imposed on the input operands and on the result operand of floating point add and subtract instructions to target corner cases when generating test cases for use in verification of floating point hardware.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: February 24, 2015
    Assignee: International Business Machines Corporation
    Inventor: Abraham Ziv
  • Publication number: 20120203813
    Abstract: Methods, apparatus and systems are disclosed for the generation of range-constrained test cases for verification of designs of arithmetic floating point units. Given three ranges of floating point numbers Rx, Ry, Rz, a floating point operation (op), and a rounding-mode (round), three floating point numbers x, y, z are generated such that x?Rx, y?Ry, z?Rz, and z=round ( x op y). Solutions are provided for add and subtract operations. Range constraints are imposed on the input operands and on the result operand of floating point add and subtract instructions to target corner cases when generating test cases for use in verification of floating point hardware.
    Type: Application
    Filed: April 17, 2012
    Publication date: August 9, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Abraham Ziv
  • Patent number: 8185569
    Abstract: Methods, apparatus and systems are disclosed for the generation of range-constrained test cases for verification of designs of arithmetic floating point units. Given three ranges of floating point numbers Rx, Ry, Rz, a floating point operation (op), and a rounding-mode (round), three floating point numbers x, y, z are generated such that x?Rx, y?Ry, z?Rz, and z=round ( x op y). Solutions are provided for add and subtract operations. Range constraints are imposed on the input operands and on the result operand of floating point add and subtract instructions to target corner cases when generating test cases for use in verification of floating point hardware.
    Type: Grant
    Filed: August 18, 2008
    Date of Patent: May 22, 2012
    Assignee: International Business Machines Corporation
    Inventor: Abraham Ziv
  • Patent number: 8122077
    Abstract: Methods, apparatus and systems are disclosed for the generation of range-constrained test cases for verification of designs of arithmetic floating point units. Given three ranges of floating point numbers Rx, Ry, Rz, a floating point operation (op), and a rounding-mode (round), three floating point numbers x, y, z are generated such that x ? Rx, y ? Ry, z ? Rz, and z=round ( x op y). Solutions are provided for add and subtract operations. Range constraints are imposed on the input operands and on the result operand of floating point add and subtract instructions to target corner cases when generating test cases for use in verification of floating point hardware.
    Type: Grant
    Filed: August 18, 2008
    Date of Patent: February 21, 2012
    Assignee: International Business Machines Corporation
    Inventor: Abraham Ziv
  • Publication number: 20080307030
    Abstract: Methods, apparatus and systems are disclosed for the generation of range-constrained test cases for verification of designs of arithmetic floating point units. Given three ranges of floating point numbers Rx, Ry, Rz, a floating point operation (op), and a rounding-mode (round), three floating point numbers x, y, z are generated such that x?Rx, y?Ry, z?Rz, and z=round ( x op y). Solutions are provided for add and subtract operations. Range constraints are imposed on the input operands and on the result operand of floating point add and subtract instructions to target corner cases when generating test cases for use in verification of floating point hardware.
    Type: Application
    Filed: August 18, 2008
    Publication date: December 11, 2008
    Applicant: International Business Machines Corporation
    Inventor: Abraham Ziv
  • Publication number: 20080307028
    Abstract: Methods, apparatus and systems are disclosed for the generation of range-constrained test cases for verification of designs of arithmetic floating point units. Given three ranges of floating point numbers Rx, Ry, Rz, a floating point operation (op), and a rounding-mode (round), three floating point numbers x, y, z are generated such that x ? Rx, y ? Ry, z ? Rz, and z=round ( x op y). Solutions are provided for add and subtract operations. Range constraints are imposed on the input operands and on the result operand of floating point add and subtract instructions to target corner cases when generating test cases for use in verification of floating point hardware.
    Type: Application
    Filed: August 18, 2008
    Publication date: December 11, 2008
    Applicant: International Business Machines Corporation
    Inventor: Abraham Ziv
  • Publication number: 20050240645
    Abstract: Methods, apparatus and systems are disclosed for the generation of range-constrained test cases for verification of designs of arithmetic floating point units. Given three ranges of floating point numbers Rx, Ry, Rz, a floating point operation (op), and a rounding-mode (round), three floating point numbers {overscore (x)}, {overscore (y)}, {overscore (z)} are generated such that {overscore (x)}?Rx, {overscore (y)}?Ry, {overscore (z)}?Rz, and {overscore (z)}=round ({overscore (x)} op {overscore (y)}). Solutions are provided for add and subtract operations. Range constraints are imposed on the input operands and on the result operand of floating point add and subtract instructions to target corner cases when generating test cases for use in verification of floating point hardware.
    Type: Application
    Filed: March 30, 2005
    Publication date: October 27, 2005
    Applicant: International Business Machines Corporation
    Inventor: Abraham Ziv
  • Patent number: 5703902
    Abstract: A method and apparatus of determining signal strength, regardless of the signal data rate, in a receiver receiving signals from a variable rate transmitter. The incoming signal is comprised of a series of frames. Each frame is comprised of a number of power control groups containing data. The number of the power control groups containing data within each frame is dependent on the unknown data rate. The position of the power control groups within the frame is a pseudorandom. The signal strength of an incoming signal of unknown data rate is determined based upon an active set of power control groups within a frame. The active set of power control groups contain data independent of the unknown data rate. This signal strength information may be used to indicate that the signal strength is sufficient to perform further signal processing.
    Type: Grant
    Filed: June 16, 1995
    Date of Patent: December 30, 1997
    Assignee: Qualcomm Incorporated
    Inventors: Noam Abraham Ziv, Roberto Padovani