Patents by Inventor Abul F Anwar

Abul F Anwar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Insulated gate silicon nanowire transistor and method of manufacture
    Patent number: 7700419
    Abstract: An insulated gate silicon nanowire transistor amplifier structure is provided and includes a substrate formed of dielectric material. A patterned silicon material may be disposed on the substrate and includes at least first, second and third electrodes uniformly spaced on the substrate by first and second trenches. A first nanowire formed in the first trench operates to electrically couple the first and second electrodes. A second nanowire formed in the second trench operates to electrically couple the second and third electrodes. First drain and first source contacts may be respectively disposed on the first and second electrodes and a first gate contact may be disposed to be capacitively coupled to the first nanowire. Similarly, second drain and second source contacts may be respectively disposed on the second and third electrodes and a second gate contact may be disposed to be capacitively coupled to the second nanowire.
    Type: Grant
    Filed: August 14, 2008
    Date of Patent: April 20, 2010
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Abul F Anwar, Richard T. Webster
  • Insulated gate silicon nanowire transistor and method of manufacture
    Patent number: 7485908
    Abstract: An insulated gate silicon nanowire transistor amplifier structure is provided and includes a substrate formed of dielectric material. A patterned silicon material may be disposed on the substrate and includes at least first, second and third electrodes uniformly spaced on the substrate by first and second trenches. A first nanowire formed in the first trench operates to electrically couple the first and second electrodes. A second nanowire formed in the second trench operates to electrically couple the second and third electrodes. First drain and first source contacts may be respectively disposed on the first and second electrodes and a first gate contact may be disposed to be capacitively coupled to the first nanowire. Similarly, second drain and second source contacts may be respectively disposed on the second and third electrodes and a second gate contact may be disposed to be capacitively coupled to the second nanowire.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: February 3, 2009
    Assignee: United States of America as represented by the Secretary of the Air Force
    Inventors: Abul F Anwar, Richard T. Webster
  • Insulated gate silicon nanowire transistor and method of manufacture
    Publication number: 20080311712
    Abstract: An insulated gate silicon nanowire transistor amplifier structure is provided and includes a substrate formed of dielectric material. A patterned silicon material may be disposed on the substrate and includes at least first, second and third electrodes uniformly spaced on the substrate by first and second trenches. A first nanowire formed in the first trench operates to electrically couple the first and second electrodes. A second nanowire formed in the second trench operates to electrically couple the second and third electrodes. First drain and first source contacts may be respectively disposed on the first and second electrodes and a first gate contact may be disposed to be capacitively coupled to the first nanowire. Similarly, second drain and second source contacts may be respectively disposed on the second and third electrodes and a second gate contact may be disposed to be capacitively coupled to the second nanowire.
    Type: Application
    Filed: August 14, 2008
    Publication date: December 18, 2008
    Inventors: Abul F. Anwar, Richard T. Webster