Abstract: A shallow trench isolation (STI) structure and fabricating method thereof is provided. A substrate is provided. A patterned mask layer is formed over the substrate. Using the patterned mask layer as an etching mask, the substrate is patterned to form a trench. A nitridation process is performed to form a silicon nitride liner on the surface of the trench. An insulating material is deposited to fill the trench. Since the silicon nitride liner within the STI is very thin, residual stress within the substrate is reduced, and the silicon nitride liner has very little or negligible impact on the trench aspect ratio.

Abstract: A shallow trench isolation (STI) structure and fabricating method thereof is provided. A substrate is provided. A patterned mask layer is formed over the substrate. Using the patterned mask layer as an etching mask, the substrate is patterned to form a trench. A nitridation process is performed to form a silicon nitride liner on the surface of the trench. An insulating material is deposited to fill the trench. Since the silicon nitride liner within the STI is very thin, residual stress within the substrate is reduced, and the silicon nitride liner has very little or negligible impact on the trench aspect ratio.

Abstract: A method for fabricating a transistor having a fully silicided gate is described. A silicon substrate with a semi-finished transistor formed thereon is provided, wherein the transistor comprises a gate dielectric film, a silicon gate, a cap layer on the silicon gate, a spacer and a source/drain region. A raised source/drain is formed on the source/drain region, and then the cap layer is removed. Subsequently, a full silicidation process is performed to fully silicide the silicon gate.

Abstract: A shallow trench isolation (STI) structure and fabricating method thereof is provided. A substrate is provided. A patterned mask layer is formed over the substrate. Using the patterned mask layer as an etching mask, the substrate is patterned to form a trench. A nitridation process is performed to form a silicon nitride liner on the surface of the trench. An insulating material is deposited to fill the trench. Since the silicon nitride liner within the STI is very thin, residual stress within the substrate is reduced, and the silicon nitride liner has very little or negligible impact on the trench aspect ratio.

Abstract: A method for fabricating a transistor having a fully silicided gate is described. A silicon substrate with a semi-finished transistor formed thereon is provided, wherein the transistor comprises a gate dielectric film, a silicon gate, a cap layer on the silicon gate, a spacer and a source/drain region. A raised source/drain is formed on the source/drain region, and then the cap layer is removed. Subsequently, a full silicidation process is performed to fully silicide the silicon gate.