Patents by Inventor Achyut Kumar Dutta
Achyut Kumar Dutta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7561006Abstract: A delay line system able to reduce the microwave loss by reducing the effective dielectric loss and dielectric constant of the system including a signal line, dielectric system with opened trench or slot filled up with the air or lower dielectric loss material, a ground plane, and a system of switches if the line is to be variable. The delay line proposed in this invention could be made of any type of signal line configuration, for example: micro-strip line, strip line, or coplanar line. The signal line can also be made as single ended or differential pairs of any configurations. The delay line systems based on the fundamental techniques provided in this invention can be used for on-chip devices where the delay line is laid on the oxide or dielectric material, or in a traditional PCB implementation such as FR4.Type: GrantFiled: August 25, 2006Date of Patent: July 14, 2009Assignee: Banpil Photonics, Inc.Inventor: Achyut Kumar Dutta
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Publication number: 20090165844Abstract: A hybrid photovoltaic device comprising a plurality of nanostructures embedded in a matrix of a photosensitive material including one or more layers. A combination of innovative structural aspects of the hybrid photovoltaic device results in significant improvements in collection of incident light from the solar spectrum, better absorption of light, and better collection of the photo-carriers generated in response to the incident light, thereby improving efficiency of the hybrid photovoltaic device.Type: ApplicationFiled: December 31, 2007Publication date: July 2, 2009Applicant: BANPIL PHOTONICS INC.Inventor: Achyut Kumar Dutta
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Patent number: 7535033Abstract: Novel structures of the photodetector having broad spectral ranges detection capability are provided. The photodetector can offer high quantum efficiency >95% over wide spectral ranges, high frequency response >10 GHz (@3 dB). The photodiode array of N×N elements is also provided. The array can also offer wide spectral detection ranges ultraviolet to 2500 nm with high quantum efficiency >95% and high quantum efficiency of >10 GHz, cross-talk of <1%. In the array, each photodiode can be independently addressable and can be made either as top-illuminated or as bottom illuminated type detector. The photodiode and its array provided in this invention, could be used in multiple purpose applications such as telecommunication, imaging and sensing applications including surveillance, satellite tracking, advanced lidar systems, etc. The advantages of this photodetectors are that they are uncooled and performance will not be degraded under wide range of temperature variation.Type: GrantFiled: September 13, 2005Date of Patent: May 19, 2009Assignee: Banpil Photonics, Inc.Inventor: Achyut Kumar Dutta
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Publication number: 20090096082Abstract: A high speed electrical interconnection system is provided. The interconnection system comprises one or more electrical signal lines, or differential pairs of signal lines, and an inhomogeneous dielectric system. The dielectric system further comprises a homogeneous dielectric layer interposed between the electrical signal lines, and electrical conducting planes including a periodic array etched in the conducting material of the conducting plane. The inhomogeneous dielectric system exhibits a lower dielectric constant as compared to the dielectric constant of the homogeneous dielectric layer, resulting in lower microwave loss, reduced signal propagation delay, reduced signal skew, and increased signal bandwidth. The interconnection system may be implemented for connecting one or more high speed electron elements on-chip, off-chip, chip-chip connection on multilayer printed circuit boards, high speed die-package, high speed connectors, and high speed electric cables.Type: ApplicationFiled: October 13, 2008Publication date: April 16, 2009Applicant: BANPIL PHOTONICS, INC.Inventor: ACHYUT KUMAR DUTTA
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Publication number: 20090072930Abstract: Fundamental interconnect systems for connecting high-speed electronics elements are provided. The interconnect systems consists of signal line, dielectric system with open trench or slot filled up with air or lower dielectric loss material, and the ground plane. The signal line could be for example, microstripline, strip line, coplanar line, single line or differential pairs. The interconnect system can be used for on-chip interconnects or can also be used for off-chip interconnects. The fundamental techniques provided in this invention can also be used for high-speed connectors and high-speed cables.Type: ApplicationFiled: September 1, 2008Publication date: March 19, 2009Inventor: Achyut Kumar Dutta
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Publication number: 20090066437Abstract: Fundamental interconnect systems for connecting high-speed electronics elements are provided. The interconnect systems consists of signal line, dielectric system with open trench or slot filled up with air or lower dielectric loss material, and the ground plane. The signal line could be for example, microstripline, strip line, coplanar line, single line or differential pairs. The interconnect system can be used for on-chip interconnects or can also be used for off-chip interconnects. The fundamental techniques provided in this invention can also be used for high-speed connectors and high-speed cables.Type: ApplicationFiled: September 1, 2008Publication date: March 12, 2009Inventor: Achyut Kumar Dutta
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Publication number: 20090066447Abstract: Fundamental interconnect systems for connecting high-speed electronics elements are provided. The interconnect systems consists of signal line, dielectric system with open trench or slot filled up with air or lower dielectric loss material, and the ground plane. The signal line could be for example, microstripline, strip line, coplanar line, single line or differential pairs. The interconnect system can be used for on-chip interconnects or can also be used for off-chip interconnects. The fundamental techniques provided in this invention can also be used for high-speed connectors and high-speed cables.Type: ApplicationFiled: September 1, 2008Publication date: March 12, 2009Inventor: Achyut Kumar Dutta
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Publication number: 20090058568Abstract: Fundamental interconnect systems for connecting high-speed electronics elements are provided. The interconnect systems consists of signal line, dielectric system with open trench or slot filled up with air or lower dielectric loss material, and the ground plane. The signal line could be for example, microstripline, strip line, coplanar line, single line or differential pairs. The interconnect system can be used for on-chip interconnects or can also be used for off-chip interconnects. The fundamental techniques provided in this invention can also be used for high-speed connectors and high-speed cables.Type: ApplicationFiled: September 1, 2008Publication date: March 5, 2009Inventor: Achyut Kumar Dutta
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Publication number: 20090058567Abstract: Fundamental interconnect systems for connecting high-speed electronics elements are provided. The interconnect systems consists of signal line, dielectric system with open trench or slot filled up with air or lower dielectric loss material, and the ground plane. The signal line could be for example, microstripline, strip line, coplanar line, single line or differential pairs. The interconnect system can be used for on-chip interconnects or can also be used for off-chip interconnects. The fundamental techniques provided in this invention can also be used for high-speed connectors and high-speed cables.Type: ApplicationFiled: September 1, 2008Publication date: March 5, 2009Inventor: Achyut Kumar Dutta
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Publication number: 20080095663Abstract: A sensing device able to do concurrent real time detection of different kinds of chemical, biomolecule agents, or biological cells and their respective concentrations using optical principles. The sensing system can be produced at a low cost (below $1.00) and in a small size (˜1 cm3). The novel sensing system may be of great value to many industries, for example, medical, forensics, and military. The fundamental principles of this novel invention may be implemented in many variations and combinations of techniques.Type: ApplicationFiled: October 23, 2006Publication date: April 24, 2008Applicant: BANPIL PHOTONICS, INC.Inventors: Achyut Kumar Dutta, Rabi Sengupta
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Publication number: 20080072958Abstract: Novel structures of photovoltaic cells (also called as solar cells) are provided. The Cells are based on the micro (or nano) structures which could not only increase the surface area but also have the capability of self concentrating the solar spectrum incident onto the cell. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications such as in space, in commercial, residential and industrial applications.Type: ApplicationFiled: September 22, 2007Publication date: March 27, 2008Applicant: BANPIL PHOTONICS, INC.Inventor: ACHYUT KUMAR DUTTA
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Publication number: 20080048800Abstract: A delay line system able to reduce the microwave loss by reducing the effective dielectric loss and dielectric constant of the system including a signal line, dielectric system with opened trench or slot filled up with the air or lower dielectric loss material, a ground plane, and a system of switches if the line is to be variable. The delay line proposed in this invention could be made of any type of signal line configuration, for example: micro-strip line, strip line, or coplanar line. The signal line can also be made as single ended or differential pairs of any configurations. The delay line systems based on the fundamental techniques provided in this invention can be used for on-chip devices where the delay line is laid on the oxide or dielectric material, or in a traditional PCB implementation such as FR4.Type: ApplicationFiled: August 25, 2006Publication date: February 28, 2008Applicant: BANPIL PHOTONICS, INC.Inventor: ACHYUT KUMAR DUTTA
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Patent number: 7298234Abstract: High-speed interconnect systems for connecting two or more electrical elements are provided. Interconnect system has the means, which could reduce the microwave loss induced due to the dielectrics. Reducing the effective loss tangent of the dielectrics reduces the microwave loss. With optimize design of the interconnects, the speed of the electrical signal can be made to closer to the speed of the light. The interconnect systems consists of the electrical signal line, inhomogeneous dielectric systems and the ground line, wherein inhomogeneous dielectric system consisting of the opened-trenches into the dielectric substrate or comb-shaped dielectrics to reduce the microwave loss. Alternatively dielectric structure can have the structure based on the fully electronic or electromagnetic crystal or quasi crystal with the line defect. Alternatively, dielectric structure can be made to comb-shaped structure with teethes having thickness and space making the air pocket to reduce the microwave loss.Type: GrantFiled: November 24, 2004Date of Patent: November 20, 2007Assignee: Banpil Photonics, Inc.Inventor: Achyut Kumar Dutta
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Patent number: 7271461Abstract: An optoelectronics chip-to-chip interconnects system is provided, including packaged chips to be connected on printed-circuit-board (PCB), multiple-packaged chip, optical-electrical(O-E) conversion means, waveguide-board, and PCB. Single to multiple chips interconnects can be possible using this technique. The packaged-chip includes semiconductor-die and its package based on the ball-grid array or chip-scale-package. The O-E board includes the optoelectronics components and multiple electrical contacts. The waveguide board includes electrical conductors transferring signal from O-E board to PCB and the flex optical waveguide easily stackable onto the PCB, to guide optical signal from one chip-to-other chip. The chip-to-chip interconnects system is pin-free and compatible with the PCB. The main advantages are that standard packaged-chip and conventional PCB technology can be used for low speed electrical signal connection.Type: GrantFiled: February 26, 2005Date of Patent: September 18, 2007Assignee: Banpil PhotonicsInventor: Achyut Kumar Dutta
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Patent number: 7145722Abstract: Novel structure of the optical elements (i.e. filter) to be operated in the long, mid, and near infrared wavelengths of lights is provided. The filter can offer very narrow linewidth, and high reflectivity (or transmissivity) at the peak wavelength. The optical element consists of the substrate, first diffraction grating and single uniform surface, and the second grating. Alternatively, the optical element again consists of the substrate, single uniform surface and the diffraction grating on the top of it. Alternatively, filter may also consist of number of sequence of layers, wherein each sequence comprises the single uniform layer sandwiched by the two diffraction grating layers. Filter again alternatively consists of the number of sequences wherein each sequence comprises the single uniform layer and the single diffraction grating. Diffraction grating may be two-step grating or multilevel grating with synchronously or nonsynchronously samples diffraction gratings.Type: GrantFiled: April 22, 2004Date of Patent: December 5, 2006Assignee: Banpil Photonics, Inc.Inventor: Achyut Kumar Dutta
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Patent number: 7115910Abstract: Novel structures of the photodetector having broad spectral ranges detection capability (from UV to 1700 nm (and also 2500 nm)) are provided. The photodetector can offer high quantum efficiency >95% over wide spectral ranges, high frequency response >8.5 GHz. The photodiode array of N×N elements is also provided. The array can also offer wide spectral detection ranges (UV to 1700 nm/2500 nm) with high quantum efficiency >85% and high quantum efficiency of >8.5 GHz, cross-talk of <1%. In the array, each photodiode can be independently addressable. The photodetector element consists of the substrate, buffer layer, absorption layer, contact layer, and the illumination surface with thin contact layer. The illumination surface can be circular, square, rectangular or ellipsometrical in shape. The photodiode array consists of the photodiode elements of N×N, where each element can be independently addressable. The sensor can be fabricated as top-illuminated type or bottom-illuminated type.Type: GrantFiled: May 5, 2004Date of Patent: October 3, 2006Assignee: Banpil Photonics, Inc.Inventor: Achyut Kumar Dutta
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Publication number: 20040240064Abstract: Novel structure of the optical elements (i.e. filter) to be operated in the long, mid, and near infrared wavelengths of lights is provided. The filter can offer very narrow linewidth, and high reflectivity (or transmissivity) at the peak wavelength. The optical element consists of the substrate, first diffraction grating and single uniform surface, and the second grating. Alternatively, the optical element again consists of the substrate, single uniform surface and the diffraction grating on the top of it. Alternatively, filter may also consist of number of sequence of layers, wherein each sequence comprises the single uniform layer sandwiched by the two diffraction grating layers. Filter again alternatively consists of the number of sequences wherein each sequence comprises the single uniform layer and the single diffraction grating. Diffraction grating may be two-step grating or multilevel grating with synchronously or nonsynchronously samples diffraction gratings.Type: ApplicationFiled: April 22, 2004Publication date: December 2, 2004Applicant: BANPIL PHOTONICS, INC.Inventor: Achyut Kumar Dutta
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Patent number: 6063643Abstract: An n-type GaAs layer as a buffer layer, an n-type (Al.sub.0.7 Ga.sub.0.3).sub.0.5 In.sub.0.5 P layer, an active layer, a p-type (Al.sub.0.7 Ga.sub.0.3).sub.0.5 In.sub.0.5 P layer, a thin layer of Al.sub.x Ga.sub.1-x As layer (x.gtoreq.0.9), an A1.sub.0.7 Ga.sub.0.3 As layer as a current spreading layer and a high doped p-type GaAs cap layer are sequentially grown on an n-type GaAs layer of a substrate. As the active layer, an (Al.sub.x Ga.sub.1-x).sub.0.5 P based bulk or multi-quantum well is employed. As the current spreading layer, an Al.sub.x Ga.sub.1-x As (x.gtoreq.0.7) is employed. The current spreading layer is a p-type III-IV compound semiconductor having wider band gap than a band gap of a material used for forming the active layer, and being established a lattice matching with the lower p-type cladding layer. After mesa etching up to the cladding layer, growth of selective oxide is performed at a part of the AlGaAs layer. BY this, a block layer (selective oxide of AlGaAs) is formed.Type: GrantFiled: March 8, 1999Date of Patent: May 16, 2000Assignee: NEC CorporationInventor: Achyut Kumar Dutta
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Patent number: 5972731Abstract: An n-type GaAs layer as a buffer layer, an n-type (Al.sub.0.7 Ga.sub.0.3).sub.0.5 In.sub.0.5 P layer, an active layer, a p-type (Al.sub.0.7 Ga.sub.0.3).sub.0.5 In.sub.0.5 P layer, a thin layer of Al.sub.x Ga.sub.1-x As layer (x.gtoreq.0.9), an Al.sub.0.7 Ga.sub.0.3 As layer as a current spreading layer and a high doped p-type GaAs cap layer are sequentially grown on an n-type GaAs layer of a substrate. As the active layer, an (Al.sub.x Ga.sub.1-x).sub.0.5 In.sub.0.5 P based bulk or multi-quantum well is employed. As the current spreading layer, an Al.sub.x Ga.sub.1-x As (x.gtoreq.0.7) is employed. The current spreading layer is a p-type III-IV compound semiconductor having wider band gap than a band gap of a material used for forming the active layer, and being established a lattice matching with the lower p-type cladding layer. After mesa etching up to the cladding layer, growth of selective oxide is performed at a part of the AlGaAs layer. BY this, a block layer (selective oxide of AlGaAs) is formed.Type: GrantFiled: April 16, 1998Date of Patent: October 26, 1999Assignee: NEC CorporationInventor: Achyut Kumar Dutta
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Patent number: 5925896Abstract: A surface-emitting semiconductor optical device is provided, which has a high external quantum efficiency and a high coupling efficiency with an optical fiber. This device has a multilayer device structure including an optical absorption layer formed by a semiconductor substrate, a semiconductor mirror layer, a first (n- or p-type) semiconductor cladding layer, a semiconductor active layer, a second (p- or n-type) semiconductor cladding layer, and a current spreading layer formed by a transparent and doped semiconductor wafer. These layers are stacked along a stacking direction of the device structure. The absorption layer is located at a first end of the body. The active layer is sandwiched between the first and second cladding layers. The mirror layer is located between the first cladding layer and the absorption layer, and serves to reflect the light generated by the active layer toward the current spreading layer.Type: GrantFiled: March 10, 1997Date of Patent: July 20, 1999Assignee: NEC CorporationInventor: Achyut Kumar Dutta