Patents by Inventor Achyuta Achari

Achyuta Achari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7156279
    Abstract: A system and method for reflowing solder to interconnect a plurality of electronic components (24) to a substrate (12) is disclosed. The system includes an oven for preheating the substrate (12) and the plurality of electronic components (24) disposed thereon, a supplemental heat source disposed in the oven for providing additional heat energy to reflow the solder (72), a pallet (14 ) for supporting the substrate (12), wherein the pallet (14) has at least one internal cavity (40), and a phase-transition material (42) disposed within the cavity (40) for absorbing heat from the pallet (14).
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: January 2, 2007
    Assignee: Visteon Global Technologie, Inc.
    Inventors: Lakhi N. Goenke, Charles Frederick Schweitzer, Jason Bullock, legal representative, Shona Bullock, legal representative, Mark D. Miller, Jay DeAvis Baker, Karen Lee Chiles, Achyuta Achari, Lawrence Lernel Bullock, deceased
  • Patent number: 6998293
    Abstract: The present invention is generally directed towards a flip chip assembly. In particular a new bonding process for bonding an electronic component to the substrate is disclosed. The method comprises the steps of forming at least one solder pad on the electronic component and forming at least one bond pad on the substrate wherein the at least one bond pad has a top layer formed of a metal. Placing an underfill film on top of the at least one bond pad and heating the electronic component and the substrate. Moving the electronic component towards the substrate such that the at least one solder pad is aligned on top of the at least one bond pad and finally forming a bond between the at least one solder pad and the top layer of the at least one bond pad.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: February 14, 2006
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Achyuta Achari, Mohan R. Paruchuri, Raja-Sheker Bollampally
  • Patent number: 6852932
    Abstract: A multi-layer circuit board having apertures that are selectively and electrically isolated from electrically grounded member and further having selectively formed air bridges and/or crossover members which are structurally supported by a polymeric material. Each of the apertures selectively receives an electrically conductive material.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: February 8, 2005
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Achyuta Achari, Andrew Zachary Glovatsky, Robert Edward Belke, Brenda Joyce Nation, Delin Li, Lakhi N. Goenka, Mohan R. Paruchuri, Robert Joseph Gordon, Thomas Bernd Krautheim
  • Patent number: 6810723
    Abstract: An integrated engine combustion monitoring system that includes at least one structure comprising a light communication channel (LCC) and a sensor, which are embedded in a cylinder head gasket, for monitoring combustion composition, pressure, or temperature. The sensor and the LCC may be positioned between an air cavity or a material comprising a photorefractive gel or polymer. The sensor includes a sensing component that may have various shapes or configurations. The LCC comprises one or more materials, such as a polymer, which may be formed into a strand or other structural shape and incorporated into the cylinder head gasket. The other end of the LCC may be fabricated as part of one or more engine structures or it may be connected to other structures or components such as optical detectors or associated process control electronics.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: November 2, 2004
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Myron Lemecha, Jay Baker, Achyuta Achari, William D. Hopfe, Lakhi N. Goenka
  • Publication number: 20040108131
    Abstract: A method for making a multi-layer circuit board 116 having apertures 96, 98 which may be selectively and electrically isolated from electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 104 which are structurally supported by material 112. Each of the apertures 96, 98 selectively receives electrically conductive material 114.
    Type: Application
    Filed: August 28, 2003
    Publication date: June 10, 2004
    Inventors: Achyuta Achari, Andrew Zachary Glovatsky, Robert Edward Belke, Brenda Joyce Nation, Delin Li, Lakhi N. Goenka, Mohan R. Paruchuri, Robert Joseph Gordon, Thomas Bernd Krautheim
  • Publication number: 20040094607
    Abstract: A system and method for reflowing solder to interconnect a plurality of electronic components (24) to a substrate (12) is disclosed. The system includes an oven for preheating the substrate (12) and the plurality of electronic components (24) disposed thereon, a supplemental heat source disposed in the oven for providing additional heat energy to reflow the solder (72), a pallet (14 ) for supporting the substrate (12), wherein the pallet (14) has at least one internal cavity (40), and a phase-transition material (42) disposed within the cavity (40) for absorbing heat from the pallet (14).
    Type: Application
    Filed: August 1, 2003
    Publication date: May 20, 2004
    Inventors: Lakhi N. Goenka, Charles Frederick Schweitzer, Lawrence Lernel Bullock, Mark D. Miller, Jay DeAvis Baker, Karen Lee Chiles, Achyuta Achari, Jason Bullock, Shona Bullock
  • Patent number: 6729023
    Abstract: A method for making a multi-layer circuit board 116 having apertures 96, 98 which may be selectively and electrically isolated from electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 104 which are structurally supported by material 112. Each of the apertures 96, 98 selectively receives electrically conductive material 114.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: May 4, 2004
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Achyuta Achari, Andrew Zachary Glovatsky, Robert Edward Belke, Brenda Joyce Nation, Delin Li, Lakhi N. Goenka, Mohan R. Paruchuri, Robert Joseph Gordon, Thomas Bernd Krautheim
  • Publication number: 20030183951
    Abstract: The present invention is generally directed towards a flip chip assembly. In particular a new bonding process for bonding an electronic component to the substrate is disclosed. The method comprises the steps of forming at least one solder pad on the electronic component and forming at least one bond pad on the substrate wherein the at least one bond pad has a top layer formed of a metal. Placing an underfill film on top of the at least one bond pad and heating the electronic component and the substrate. Moving the electronic component towards the substrate such that the at least one solder pad is aligned on top of the at least one bond pad and finally forming a bond between the at least one solder pad and the top layer of the at least one bond pad.
    Type: Application
    Filed: March 29, 2002
    Publication date: October 2, 2003
    Inventors: Achyuta Achari, Mohan R. Paruchuri, Raja-Sheker Bollampally
  • Patent number: 6601292
    Abstract: A method for making and repairing connections between first and second circuits, such as flex circuits. An article 10 includes: a flexible dielectric substrate 12 having first and second edges 14/16, and a plurality of conductive circuit traces 18 arranged on or within the substrate, wherein each of the traces extends from proximate the first edge 14 to proximate the second edge 16. Each of the circuit traces 18 includes: a first connection feature 20 disposed proximate the first edge 14; a second connection feature 22 disposed proximate the second edge 16; and at least one third connection feature 24 disposed between the first and second edges 14/16. Each of the first, second, and third connection features 20/22/24 is a plated through hole, a plated blind via, or a mounting pad. This article 10 may be used to connect together the first and second circuits 50/60 using the first and second connection features 20/22, such as by soldering. If either of the two circuits needs to be subsequently detached (e.g.
    Type: Grant
    Filed: June 26, 2001
    Date of Patent: August 5, 2003
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Delin Li, Jay DeAvis Baker, Achyuta Achari, Brenda Joyce Nation, John Trublowski
  • Patent number: 6555015
    Abstract: Method of manufacturing a multi-layer printed circuit board adapted for reduce interfacial sheer stresses includes a laminate substrate having a top layer forming a first major surface, a middle layer having a predetermined thickness and a bottom layer forming a second major surface opposed to the first major surface. Etch resists are disposed on the first and second surfaces corresponding to reverse images of desired conductor patterns. The first and second surfaces are thereafter etched and the photoresist removed. The laminate substrate is secured via a low modules adhesive layer to a major surface of a base. The middle layer of the laminate substrate is thereafter selectively etched so as to isolate selected portions of the first and second surfaces and to define inner connect regions therebetween having a height equal to the predetermined thickness.
    Type: Grant
    Filed: November 9, 2000
    Date of Patent: April 29, 2003
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Daniel Phillip Dailey, Robert Edward Belke, Jr., Jay DeAvis Baker, Achyuta Achari, Myron Lemecha, Michael George Todd
  • Publication number: 20030074957
    Abstract: An integrated engine combustion monitoring system that includes at least one structure comprising a light communication channel (LCC) and a sensor, which are embedded in a cylinder head gasket, for monitoring combustion composition, pressure, or temperature. The sensor and the LCC may be positioned between an air cavity or a material comprising a photorefractive gel or polymer. The sensor includes a sensing component that may have various shapes or configurations. The LCC comprises one or more materials, such as a polymer, which may be formed into a strand or other structural shape and incorporated into the cylinder head gasket. The other end of the LCC may be fabricated as part of one or more engine structures or it may be connected to other structures or components such as optical detectors or associated process control electronics.
    Type: Application
    Filed: August 28, 2002
    Publication date: April 24, 2003
    Applicant: Visteon Global Technologies, Inc.
    Inventors: Myron Lemecha, Jay Baker, Achyuta Achari, William D. Hopfe, Lakhi N. Goenka
  • Patent number: 6528736
    Abstract: Method of manufacturing a multi-layer printed circuit board adapted for reduce interfacial sheer stresses includes a laminate substrate having a top layer forming a first major surface, a middle layer having a predetermined thickness and a bottom layer forming a second major surface opposed to the first major surface. Etch resists are disposed on the first and second surfaces corresponding to reverse images of desired conductor patterns. The first and second surfaces are thereafter etched and the photoresist removed. The laminate substrate is secured via a low modules adhesive layer to a major surface of a base. The middle layer of the laminate substrate is thereafter selectively etched so as to isolate selected portions of the first and second surfaces and to define inner connect regions therebetween having a height equal to the predetermined thickness.
    Type: Grant
    Filed: January 21, 1997
    Date of Patent: March 4, 2003
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Daniel Phillip Dailey, Robert Edward Belke, Jr., Jay DeAvis Baker, Achyuta Achari, Myron Lemecha, Michael George Todd
  • Patent number: 6475703
    Abstract: A multilayer circuit board having air bridge crossover structures and an additive method for producing the same, wherein the circuit includes specially designed metallic fortifying layers to mechanically and/or electrically fortify the circuit.
    Type: Grant
    Filed: December 1, 1998
    Date of Patent: November 5, 2002
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Delin Li, Achyuta Achari, Alice Dawn Zitzmann, Robert Edward Belke, Jr., Brenda Joyce Nation, Edward McLeskey, Mohan R. Paruchuri, Lakhi Nandlal Goenka
  • Patent number: 6467161
    Abstract: A method 10, 110 for making multi-layer electronic circuit boards 82, 148 having metallized apertures 18, 20, 118, 120 which may be selectively and electrically connected to a source of ground potential.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: October 22, 2002
    Assignee: Visteon Global Tech., Inc.
    Inventors: Achyuta Achari, Brenda Joyce Nation, Delin Li, Lakhi N. Goenka, Richard Keith McMillan, Vivek A. Jairazbhoy
  • Patent number: 6459041
    Abstract: A tri-metallic material for use in the manufacture of printed circuit boards is described, and the process for its manufacture is described. The tri-metallic material is a sandwich wherein a copper layer is essential the “bread” of the sandwich and an aluminum layer is the filling between both slices of bread. A metallic bonding and/or barrier layer is spread on the aluminum and is selected for its highly non-corrosive properties as well as its bonding, and diffusion inhibiting capabilities.
    Type: Grant
    Filed: November 1, 2000
    Date of Patent: October 1, 2002
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Achyuta Achari, Lakhi Nandlal Goenka, Mohan R. Paruchuri
  • Patent number: 6454878
    Abstract: A method for forming sets of tri-metal material involving the use of cladding mills. When multiple sets of tri-metal material are formed, the outside surfaces of each set is prepared by oxidation to prevent each set from adhering to the set above or below. An alternative to oxidation is to provide a removable layer on the outside surface of the tri-metal material. Alternatively bonding materials may be used on the intermediate surfaces; such bonding materials can be selected from a group consisting of tin, nickel, titanium, chromium, silver and zinc.
    Type: Grant
    Filed: November 1, 2000
    Date of Patent: September 24, 2002
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Achyuta Achari, Brenda Joyce Nation, Jay D Baker, Lakhi Nandlal Goenka, Mohan R. Paruchuri, Vladimir Stoica
  • Publication number: 20020086243
    Abstract: A multilayer circuit board having air bridge crossover structures and an additive method for producing the same, wherein the circuit includes specially designed metallic fortifying layers to mechanically and/or electrically fortify the circuit.
    Type: Application
    Filed: December 1, 1998
    Publication date: July 4, 2002
    Inventors: DELIN LI, ACHYUTA ACHARI, ALICE DAWN ZITZMANN, ROBERT EDWARD BELKE, BRENDA JOYCE NATION, EDWARD MCLESKEY, MOHAN R. PARUCHURI, LAKHI NANDLAL GOENKA
  • Patent number: 6403893
    Abstract: A method for making a multi-layer electronic circuit board 136 having electroplated apertures 96, 98 which may be selectively and electrically isolated from an electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 128 which are structurally supported by material 134.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: June 11, 2002
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Achyuta Achari, Andrew Zachary Glovatsky, Robert Edward Belke, Brenda Joyce Nation, Delin Li, Lakhi N. Goenka, Robert Joseph Gordon, Thomas Bernd Krautheim
  • Publication number: 20010052423
    Abstract: A method for making a multi-layer electronic circuit board 136 having electroplated apertures 96, 98 which may be selectively and electrically isolated from an electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 128 which are structurally supported by material 134.
    Type: Application
    Filed: March 20, 2001
    Publication date: December 20, 2001
    Inventors: Achyuta Achari, Andrew Zachary Glovatsky, Robert Edward Belke, Brenda Joyce Nation, Delin Li, Lakhi N. Goenka, Robert Joseph Gordon, Thomas Bernd Krautheim
  • Publication number: 20010040048
    Abstract: A method 10, 110 for making multi-layer electronic circuit boards 82, 148 having metallized apertures 18, 20, 118, 120 which may be selectively and electrically connected to a source of ground potential.
    Type: Application
    Filed: March 20, 2001
    Publication date: November 15, 2001
    Inventors: Achyuta Achari, Brenda Joyce Nation, Delin Li, Lakhi N. Goenka, Richard Keith McMillan, Vivek A. Jairazbhoy, Andrew Zachary Glovatsky, Robert Edward Belke, Robert Joseph Gordon, Thomas Bernd Krautheim