Patents by Inventor Achyutram Bhamidipaty

Achyutram Bhamidipaty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9852298
    Abstract: In response to starting a system including a first non-volatile memory containing system boot code, and a second non-volatile memory, provisioning of the second non-volatile memory is performed. The provisioning includes checking that the second non-volatile memory is uninitialized, and in response to determining that the second non-volatile memory is uninitialized, the system boot code is copied from the first non-volatile memory to the second non-volatile memory.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: December 26, 2017
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffrey Kevin Jeansonne, Marat Nersisyan, Achyutram Bhamidipaty, Jayne E Scott
  • Publication number: 20160055338
    Abstract: In response to starting a system including a first non-volatile memory containing system boot code, and a second non-volatile memory, provisioning of the second non-volatile memory is performed. The provisioning includes checking that the second non-volatile memory is uninitialized, and in response to determining that the second non-volatile memory is uninitialized, the system boot code is copied from the first non-volatile memory to the second non-volatile memory.
    Type: Application
    Filed: April 23, 2013
    Publication date: February 25, 2016
    Inventors: JEFFREY KEVIN JEANSONNE, MARAT NERSISYAN, ACHYUTRAM BHAMIDIPATY, JAYNE E SCOTT
  • Patent number: 8484230
    Abstract: Methods, program products, and systems implementing dynamic parsing rules are disclosed. Log data from a variety of log producers can be parsed using parsing rules to generate information about an information system. The parsing rules can include system parsing rules and custom parsing rules. A state machine can be used to detect conflicts between various parsing rules. A central server can distribute the system parsing rules and custom parsing rules to one or more remote servers for distributed processing. In a hierarchical parsing system, a first tier parser can be used to identify types of sources generating the log data. Log data from each type of log source can be sent to a second tier parser that corresponds to the type of log source.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: July 9, 2013
    Assignee: TIBCO Software Inc.
    Inventors: Tim Harnett, Achyutram Bhamidipaty, Abinas Tewari, Stephen Manley, Stephen Morgan, Peter Nicklin, Jean-Francois Roy
  • Publication number: 20120197914
    Abstract: Methods, program products, and systems implementing dynamic parsing rules are disclosed. Log data from a variety of log producers can be parsed using parsing rules to generate information about an information system. The parsing rules can include system parsing rules and custom parsing rules. A state machine can be used to detect conflicts between various parsing rules. A central server can distribute the system parsing rules and custom parsing rules to one or more remote servers for distributed processing. In a hierarchical parsing system, a first tier parser can be used to identify types of sources generating the log data. Log data from each type of log source can be sent to a second tier parser that corresponds to the type of log source.
    Type: Application
    Filed: September 2, 2011
    Publication date: August 2, 2012
    Inventors: Tim Harnett, Achyutram Bhamidipaty, Abinas Tewari, Stephen Manley, Stephen Morgan, Peter Nicklin, Jena-Francois Roy
  • Patent number: 6874132
    Abstract: Embodiments of the present invention relate to a computer-controlled method for extracting cell parasitic characteristics for netlist back-annotation in a circuit that comprises a row and column array of repeated cells. The method comprises the steps of generating parasitic and connection data for a row and a column of said cells in the arrayed circuit, duplicating the generated parasitic data for an additional row and an additional column in the arrayed circuit; synthesizing connection data for the additional row from a connected cell in that additional row; synthesizing connection data for the additional column from a connected cell in that additional column, and making the generated parasitic data and the synthesized connection data available for subsequent back-annotation of the netlist.
    Type: Grant
    Filed: September 11, 2002
    Date of Patent: March 29, 2005
    Assignee: Synopsys, Inc.
    Inventor: Achyutram Bhamidipaty
  • Patent number: 5107142
    Abstract: A tristate driver circuit including a first output transistor for furnishing a first output voltage at an output terminal in the on condition, the first transistor being susceptible to disablement or degraded operation from back biasing in the presence of voltages above a particular level at the output terminal in the off condition, a second output transistor for furnishing a second output voltage at the output terminal in the on condition, apparatus for biasing the first and second transistors to allow operation thereof in the presence of enable signals and to disable operation in the absence of enable signals, and apparatus for eliminating back biasing of the first transistor in the absence of enable signals.
    Type: Grant
    Filed: October 29, 1990
    Date of Patent: April 21, 1992
    Assignee: Sun Microsystems, Inc.
    Inventor: Achyutram Bhamidipaty