Patents by Inventor Adam Bordelon

Adam Bordelon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230325312
    Abstract: A method for merging buffers and associated operations includes receiving a compute graph for a reconfigurable dataflow computing system and conducting a buffer allocation and merging process responsive to determining that a first operation specified by a first operation node is a memory indexing operation and that the first operation node is a producer for exactly one consuming node that specifies a second operation. The buffer allocation and merging process may include replacing the first operation node and the consuming node with a merged buffer node within the graph responsive to determining that the first operation and the second operation can be merged into a merged indexing operation and that the resource cost of the merged node is less than the sum of the resource costs of separate buffer nodes. A corresponding system and computer readable medium are also disclosed herein.
    Type: Application
    Filed: October 27, 2022
    Publication date: October 12, 2023
    Applicant: SambaNova Systems, Inc.
    Inventors: David Alan KOEPLINGER, Adam BORDELON, Weihang FAN, Kevin BROWN, Weiwei CHEN
  • Publication number: 20230273879
    Abstract: A method for reducing latency and increasing throughput in a reconfigurable computing system includes receiving a user program for execution on a reconfigurable dataflow computing system, comprising a grid of compute units and grid of memory units interconnected with a switching array. The user program includes multiple tensor-based algebraic expressions that are converted to an intermediate representation comprising multiple stages. Each stage includes one or more logical operations executable via dataflow through compute units, and each stage is preceded by and followed by a buffer, each buffer corresponding to one or more memory units. The method includes detecting a memory mapping operation within a critical stage and moving the memory mapping operation to an adjacent stage, wherein the memory mapping operation is executable by memory units within the adjacent stage and dataflow through the buffer is controlled by one or more memory units within the grid of memory units.
    Type: Application
    Filed: February 28, 2023
    Publication date: August 31, 2023
    Applicant: SambaNova Systems, Inc.
    Inventors: Adam BORDELON, David Alan KOEPLINGER
  • Patent number: 10270759
    Abstract: A system for a containerized application includes an interface and a processor. The interface is configured to receive an indication from a user to create a containerized application. The indication comprises a first user authentication information (e.g., an authentication token issued by an authentication server) and an application permission information. The processor is configured to determine whether the first user authentication information indicates that the user has permission to create a definition for the containerized application with the application permission information, and, if so, create the definition for the containerized application with the application permission information. The processor is configured to determine whether a second user authentication information indicates that the user has permission to execute the containerized application using the definition for the containerized application, and, if so, indicate to process a job using the containerized application.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: April 23, 2019
    Assignee: Mesosphere, Inc.
    Inventors: Adam Bordelon, Jan Philip Gehrcke, Albertus Strasheim