Patents by Inventor Adam Charles Lange-Pearson

Adam Charles Lange-Pearson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for updating a time-related state of a migrating logical partition
    Patent number: 7849347
    Abstract: An apparatus, program product and method for automatically and transparently determining the time required to migrate a logical partition. This determined latency may be used to update clocks and other time-related values of the migrated logical partition.
    Type: Grant
    Filed: April 16, 2007
    Date of Patent: December 7, 2010
    Assignee: International Business Machines Corporation
    Inventors: William Joseph Armstrong, Adam Charles Lange-Pearson, Naresh Nayar
  • System and Method for Updating a Time-Related State of a Migrating Logical Partition
    Publication number: 20080256501
    Abstract: An apparatus, program product and method for automatically and transparently determining the time required to migrate a logical partition. This determined latency may be used to update clocks and other time-related values of the migrated logical partition.
    Type: Application
    Filed: April 16, 2007
    Publication date: October 16, 2008
    Inventors: William Joseph Armstrong, Adam Charles Lange-Pearson, Naresh Nayar
  • Method, apparatus, and computer program product for implementing time synchronization correction in computer systems
    Patent number: 7085948
    Abstract: A method, apparatus and computer program product are provided for implementing time synchronization correction in computer systems. A service processor includes a battery-backed hardware clock, and a hypervisor includes a hypervisor system clock. A common timer resource is accessible by the hypervisor and the service processor. To synchronize the battery-backed hardware clock and the hypervisor system clock, the common timer resource is used to measure the latency in the communication medium between the hypervisor and the service processor. The latency is then added onto the time value received in time of day messages between the hypervisor and the service processor for time synchronization correction in the computer systems.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: August 1, 2006
    Assignee: International Business Machines Corporation
    Inventors: Gary Dean Anderson, Adam Charles Lange-Pearson, Thomas Joseph Warne
  • Method, apparatus, and computer program product for implementing time synchronization correction in computer systems
    Publication number: 20040215992
    Abstract: A method, apparatus and computer program product are provided for implementing time synchronization correction in computer systems. A service processor includes a battery-backed hardware clock, and a hypervisor includes a hypervisor system clock. A common timer resource is accessible by the hypervisor and the service processor. To synchronize the battery-backed hardware clock and the hypervisor system clock, the common timer resource is used to measure the latency in the communication medium between the hypervisor and the service processor. The latency is then added onto the time value received in time of day messages between the hypervisor and the service processor for time synchronization correction in the computer systems.
    Type: Application
    Filed: April 24, 2003
    Publication date: October 28, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gary Dean Anderson, Adam Charles Lange-Pearson, Thomas Joseph Warne