Patents by Inventor Adam Conway
Adam Conway has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250148393Abstract: The present application describes a payload management system that routes a payload item associated with an individual from an origin to a destination. In some examples, the payload item is routed from the origin to the destination separate from a travel itinerary associated with the individual. For example, the payload item can be routed via a vehicle other than a VTOL aircraft that is assigned to the individual for a multi-modal transportation service.Type: ApplicationFiled: November 18, 2024Publication date: May 8, 2025Inventors: Ian Andreas Villa, John Conway Badalamenti, Mark Moore, Adam Warmoth
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Patent number: 12287952Abstract: Technologies are disclosed that enable a computing system to present a structured arrangement for tracking content items on a shared user interface (UI) during a communication session. The structured arrangement is a list that is displayed in a specific region of the shared UI. Inclusion of content items in the list makes it easier for users to locate and interact with those content items throughout the communication session. The ability to create and manipulate the list may be limited to only certain users such as a moderator. Use of this list can promote inclusivity and fairness. For instance, inclusion in the list may prevent content items from being forgotten or ignored. Additionally, the names of users who contributed the content items may be shown in the list thereby providing recognition for those users.Type: GrantFiled: July 9, 2021Date of Patent: April 29, 2025Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Hannah Rebecca Lewbel, Isabel Sophie Sharp, Adam Michael Gleisner, Lindsey Conway, Clea Allington, Minu George, Samantha Robbie Courts, Margaret Arlene Grounds, Scott H. W. Snyder, Nassr Albahadly
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Publication number: 20250093970Abstract: A computer-implemented method for controlling a particular computer to execute a task is described. The method includes receiving a control input comprising a visual input, the visual input including one or more screen frames of a computer display that represent at least a current state of the particular computer; processing the control input using a neural network to generate one or more control outputs that are used to control the particular computer to execute the task, in which the one or more control outputs include an action type output that specifies at least one of a pointing device action or a keyboard action to be performed to control the particular computer; determining one or more actions from the one or more control outputs; and executing the one or more actions to control the particular computer.Type: ApplicationFiled: December 4, 2024Publication date: March 20, 2025Inventors: Peter Conway Humphreys, Timothy Paul Lillicrap, Tobias Markus Pohlen, Adam Anthony Santoro
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Patent number: 12211392Abstract: Systems and methods for communicating aircraft sensory cues are provided. A method can include obtaining aerial vehicle data and facility data for an aerial portion of a multi-modal transportation service. The method can include determining a plurality of sensory cues indicative of information for the aerial portion of the transportation service such as a safe path across a landing pad of the facility, a seating assignment for a passenger, etc. The method can include communicating sensory data indicative of the plurality of sensory cues to at least one of a facility computing system associated with the facility or an aerial computing system associated with the at least one aerial vehicle. The facility computing system and/or aerial computing system can output the sensory cue(s) to at least one passenger or operator of the aerial portion of the multi-modal transportation service in, for example, the facility's landing area.Type: GrantFiled: December 18, 2020Date of Patent: January 28, 2025Assignee: JOBY AERO, INC.Inventors: Ian Andreas Villa, Matthew Derkach, Philipp Haban, Adam Warmoth, John Conway Badalamenti
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Patent number: 12170330Abstract: An apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate including a first semiconductor material, an array of three dimensional (3D) structures above the substrate, a sidewall heterojunction layer positioned on at least one vertical sidewall of each 3D structure, and an isolation region positioned between the 3D structures. Each 3D structure includes the first semiconductor material. The sidewall heterojunction layer includes a second semiconductor material, where the first and second semiconductor material have different bandgaps.Type: GrantFiled: April 22, 2021Date of Patent: December 17, 2024Assignee: Lawrence Livermore National Security, LLCInventors: Adam Conway, Sara Elizabeth Harrison, Rebecca Nikolic, Qinghui Shao, Lars Voss
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Patent number: 12015036Abstract: Devices, systems and methods for solid-state X-ray detection with high temporal resolution are described. An example method includes receiving an X-ray pulse in a semiconductor chip resulting in an electron cloud being formed in the semiconductor chip, applying a first set of voltages across a first plurality of drift cathode strips on a first side of the semiconductor chip and a second plurality of drift cathode strips on a second side of the semiconductor chip, applying a second set of voltages to across the first and the second plurality of drift cathode strips to form an electric field having a linear profile to cause the electron cloud to drift along the middle of the semiconductor chip, and activating a counter cathode on the second side and one or more readout anodes on the first side to collect the electron cloud after spreading in the middle section of the semiconductor chip.Type: GrantFiled: April 27, 2021Date of Patent: June 18, 2024Assignees: Lawrence Livermore National Security, LLC, The Regents of the University of CaliforniaInventors: David Lawrence Hall, Mihail Bora, Adam Conway, Philip Datte, Qinghui Shao, Erik Lars Swanberg, Jr., Clement Antoine Trosseille, Charles Edward Hunt
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Patent number: 11805715Abstract: A photoconductive switch that uses materials that support negative differential mobility, whose operation leverages the pulse compression of a charge could to generate the “on” time of the pulse in combination with the speed of light to generate the “off” time of the pulse, is described. In one example, a method of operating a photoconductive switch, which includes two electrodes and a light absorbing material positioned therebetween, includes selecting a value for one or more parameters comprising a voltage for generation of an electric field, a spot size of a laser pulse, a temporal pulse width of the laser pulse, or an intensity of the laser pulse, wherein the selected value(s) for the one or more parameters enable the switch to operate in a region where the light absorbing material exhibits negative differential mobility, and illuminating the light absorbing material with the laser pulse to generate a charge cloud within the light absorbing material.Type: GrantFiled: October 15, 2021Date of Patent: October 31, 2023Assignees: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC, THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOISInventors: Lars F. Voss, Adam Conway, Karen Marie Dowling, David Lawrence Hall, Shaloo Rakheja, Kexin Li
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Publication number: 20230327400Abstract: Ultraviolet light sources such as UV and DUV laser diodes and light emitting diodes (LEDs) are described. The UV light source may comprise at least one quantum well with first and second photoconductive layers on opposite sides thereof. The UV light source may further comprise at least one optical pump configured to direct pump light to the UV light emitter. The pump light may have a photon energy less than the band gap of the at least one quantum well to increase the conductivity of electrons and holes in the first and second photoconductive layers. The electrons and holes can thereby propagate to the quantum well where at least some of the electrons and holes combine resulting in the emission of UV light.Type: ApplicationFiled: April 12, 2022Publication date: October 12, 2023Inventors: Lars Voss, Adam Conway, Selim Elhadj, Vincenzo Lordi, Joel Basile Varley
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Patent number: 11784616Abstract: Power amplifier apparatuses and techniques for optimizing the design of power amplifiers are disclosed. In one aspect, a method for optimizing a power amplifier includes selecting a circuit topology for the power amplifier. The circuit topology includes one or more photoconductive switches and an impedance matching network including one or more parameter values representative of the impedance matching network or the photoconductive switches that can be adjusted. The method further includes selecting one or more optimization goals for the impedance matching network and the one or more photoconductive switches, and adjusting the one or more parameter values according to the one or more optimization goals. The one or more optimization goals include an efficiency at a particular power output.Type: GrantFiled: March 16, 2021Date of Patent: October 10, 2023Assignees: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC, SOCAL SIMULATIONS, LLCInventors: Tammy Chang, Adam Conway, Victor Valeryevich Khitrov, Lars Voss, Benjamin Fasenfest, Peter Asbeck
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Patent number: 11742424Abstract: In one embodiment, an apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate comprising a semiconductor material, an array of three dimensional (3D) structures above the substrate, a gate region, and an isolation region positioned between the 3D structures. Each 3D structure includes the semiconductor material. Each 3D structure also includes a first region having a first conductivity type and a second region having a second conductivity type, the second region including a portion of at least one vertical sidewall of the 3D structure. The gate region is present on a portion of an upper surface of the second region and the gate region is coupled to a portion of the at least one vertical sidewall of each 3D structure.Type: GrantFiled: January 7, 2021Date of Patent: August 29, 2023Assignee: Lawrence Livermore National Security, LLCInventors: Adam Conway, Sara Elizabeth Harrison, Rebecca Nikolic, Qinghui Shao, Lars Voss
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Patent number: 11555965Abstract: Methods and devices for illuminating a photoconductive switch consisting of an optically actuated photoconductive material situated between two electrodes are described. Light from a light source is coupled to an optical fiber, which is attached to a frustum, the other side of which is proximate to the photoconductive switch. Light from the optical fiber enters the frustum, spreads out, and enters the photoconductive switch via the top-side electrode. Some of the light is absorbed, while the remaining light reflects off the bottom-side electrode, travels back through the photoconductive switch, and any unabsorbed light reenters the frustum. The geometry of the frustum is configured such that most of the light reflects back into the switch itself with only a negligible fraction escaping from the optical fiber, which advantageously results in near total utilization of the light.Type: GrantFiled: July 9, 2021Date of Patent: January 17, 2023Assignee: LAWRENCE LIVERMORE NATIONAL SECURITY, LLCInventors: Michael Rushford, Adam Conway, Lars F. Voss, Joseph D. Schneider, Tammy Chang, Caitlin Anne Chapin, John Berns Lancaster, Steve Hawkins, Victor Valeryevich Khitrov
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Publication number: 20230011108Abstract: Methods and devices for illuminating a photoconductive switch consisting of an optically actuated photoconductive material situated between two electrodes are described. Light from a light source is coupled to an optical fiber, which is attached to a frustum, the other side of which is proximate to the photoconductive switch. Light from the optical fiber enters the frustum, spreads out, and enters the photoconductive switch via the top-side electrode. Some of the light is absorbed, while the remaining light reflects off the bottom-side electrode, travels back through the photoconductive switch, and any unabsorbed light reenters the frustum. The geometry of the frustum is configured such that most of the light reflects back into the switch itself with only a negligible fraction escaping from the optical fiber, which advantageously results in near total utilization of the light.Type: ApplicationFiled: July 9, 2021Publication date: January 12, 2023Inventors: Michael Rushford, Adam Conway, Lars F. Voss, Joseph D. Schneider, Tammy Chang, Caitlin Anne Chapin, John Berns Lancaster, Steve Hawkins, Victor Valeryevich Khitrov
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Publication number: 20220123211Abstract: A photoconductive switch that uses materials that support negative differential mobility, whose operation leverages the pulse compression of a charge could to generate the “on” time of the pulse in combination with the speed of light to generate the “off” time of the pulse, is described. In one example, a method of operating a photoconductive switch, which includes two electrodes and a light absorbing material positioned therebetween, includes selecting a value for one or more parameters comprising a voltage for generation of an electric field, a spot size of a laser pulse, a temporal pulse width of the laser pulse, or an intensity of the laser pulse, wherein the selected value(s) for the one or more parameters enable the switch to operate in a region where the light absorbing material exhibits negative differential mobility, and illuminating the light absorbing material with the laser pulse to generate a charge cloud within the light absorbing material.Type: ApplicationFiled: October 15, 2021Publication date: April 21, 2022Inventors: Lars F. Voss, Adam Conway, Karen Marie Dowling, David Lawrence Hall, Shaloo Rakheja, Kexin Li
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Patent number: 11275849Abstract: A database management tool performs updates or sequential operations to large databases. A configuration file specifies source, destination (if different than source), encryption status, order, throttling limits, and number of threads to maintain, among other settings. A queue table points the tool at the database to be converted and maintains current row ID and status. The queue table may also hold the location of a hardware security module (HSM) if one is used for encryption, decryption, or hashing. The database management tool may use the configuration file to retrieve a record, perform the specified action, such as sending the record to an HSM for decryption with an old key and encryption with a new key, and replacing the old record with the updated record. The queue table may be updated with a running record of where the last operation occurred to allow rollbacks if necessary.Type: GrantFiled: August 2, 2019Date of Patent: March 15, 2022Assignee: VISA INTERNATIONAL SERVICE ASSOCIATIONInventor: Adam Conway
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Publication number: 20220069785Abstract: Power amplifier apparatuses and techniques for optimizing the design of power amplifiers are disclosed. In one aspect, a method for optimizing a power amplifier includes selecting a circuit topology for the power amplifier. The circuit topology includes one or more photoconductive switches and an impedance matching network including one or more parameter values representative of the impedance matching network or the photoconductive switches that can be adjusted. The method further includes selecting one or more optimization goals for the impedance matching network and the one or more photoconductive switches, and adjusting the one or more parameter values according to the one or more optimization goals. The one or more optimization goals include an efficiency at a particular power output.Type: ApplicationFiled: March 16, 2021Publication date: March 3, 2022Inventors: Tammy Chang, Adam Conway, Victor Valeryevich Khitrov, Lars Voss, Benjamin Fasenfest, Peter Asbeck
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Publication number: 20210335866Abstract: Devices, systems and methods for solid-state X-ray detection with high temporal resolution are described. An example method includes receiving an X-ray pulse in a semiconductor chip resulting in an electron cloud being formed in the semiconductor chip, applying a first set of voltages across a first plurality of drift cathode strips on a first side of the semiconductor chip and a second plurality of drift cathode strips on a second side of the semiconductor chip, applying a second set of voltages to across the first and the second plurality of drift cathode strips to form an electric field having a linear profile to cause the electron cloud to drift along the middle of the semiconductor chip, and activating a counter cathode on the second side and one or more readout anodes on the first side to collect the electron cloud after spreading in the middle section of the semiconductor chip.Type: ApplicationFiled: April 27, 2021Publication date: October 28, 2021Inventors: David Lawrence Hall, Mihail Bora, Adam Conway, Philip Datte, Qinghui Shao, Erik Lars Swanberg, JR., Clement Antoine Trosseille, Charles Edward Hunt
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Publication number: 20210328057Abstract: An apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate including a first semiconductor material, an array of three dimensional (3D) structures above the substrate, a sidewall heterojunction layer positioned on at least one vertical sidewall of each 3D structure, and an isolation region positioned between the 3D structures. Each 3D structure includes the first semiconductor material. The sidewall heterojunction layer includes a second semiconductor material, where the first and second semiconductor material have different bandgaps.Type: ApplicationFiled: April 22, 2021Publication date: October 21, 2021Inventors: Adam Conway, Sara Elizabeth Harrison, Rebecca Nikolic, Qinghui Shao, Lars Voss
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Patent number: 11113031Abstract: A method of loading project data comprising identifying project files with a project ID. The method includes determining a secondary project file is referenced in a primary project file. The method includes loading the project ID of the secondary and primary project files into a reference table. The primary project file project ID and the secondary project file project ID referenced in the respective primary project file are associated with one another in the reference table. The method includes receiving a query for the primary project files referencing a queried secondary project file. The method includes determining the project IDs of the primary project files in the reference associated with the project ID of the queried secondary project file. The method includes providing a results table including the primary project file project IDs associated with the queried secondary project file project ID in the reference table.Type: GrantFiled: October 10, 2018Date of Patent: September 7, 2021Assignee: VISA INTERNATIONAL SERVICE ASSOCIATIONInventors: Sue Zhu, Adam Conway
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Patent number: 11024734Abstract: In one embodiment, a method of forming a vertical transistor includes forming a layer comprising a semiconductor material above a substrate, defining three dimensional (3D) structures in the layer, forming a second region in at least one vertical sidewall of each 3D structure, and forming an isolation region between the 3D structures. In another embodiment, an apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate comprising a semiconductor material, an array of 3D structures above the substrate, and an isolation region positioned between the 3D structures. Each 3D structure includes the semiconductor material. Each 3D structure also includes a first region having a first conductivity type and a second region having a second conductivity type, the second region including a portion of at least one vertical sidewall of the 3D structure.Type: GrantFiled: January 4, 2017Date of Patent: June 1, 2021Assignee: Lawrence Livermore National Security, LLCInventors: Adam Conway, Sara Elizabeth Harrison, Rebecca J. Nikolic, Qinghui Shao, Lars Voss
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Publication number: 20210159337Abstract: In one embodiment, an apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate comprising a semiconductor material, an array of three dimensional (3D) structures above the substrate, a gate region, and an isolation region positioned between the 3D structures. Each 3D structure includes the semiconductor material. Each 3D structure also includes a first region having a first conductivity type and a second region having a second conductivity type, the second region including a portion of at least one vertical sidewall of the 3D structure. The gate region is present on a portion of an upper surface of the second region and the gate region is coupled to a portion of the at least one vertical sidewall of each 3D structure.Type: ApplicationFiled: January 7, 2021Publication date: May 27, 2021Inventors: Adam Conway, Sara Elizabeth Harrison, Rebecca Nikolic, Qinghui Shao, Lars Voss