Patents by Inventor Adam Faust

Adam Faust has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11694869
    Abstract: A method, a non-transitory computer readable medium and a device. The method may include (a) introducing a voltage difference between an absolute value of a negative pole of the electrostatic chuck and an absolute value of a positive pole of the electrostatic chuck, the introducing occurs while the wafer is supported by the electrostatic chuck and is contacted by one or more conductive contact pins of the electrostatic chuck; (b) monitoring, by an electrostatic sensor that comprises a sensing element, a charge at a point of measurement located at a front side of the wafer, at different points of time that follow a start of the introducing of the voltage difference, to provide monitoring results; and (c) determining an electrical parameter of the contact between the wafer and the electrostatic chuck, based on the monitoring results.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: July 4, 2023
    Assignee: Applied Materials Israel Ltd.
    Inventors: Adam Faust, Yosef Basson, Guy Eytan, Yonathan David
  • Publication number: 20220181115
    Abstract: A method, a non-transitory computer readable medium and a device. The method may include (a) introducing a voltage difference between an absolute value of a negative pole of the electrostatic chuck and an absolute value of a positive pole of the electrostatic chuck, the introducing occurs while the wafer is supported by the electrostatic chuck and is contacted by one or more conductive contact pins of the electrostatic chuck; (b) monitoring, by an electrostatic sensor that comprises a sensing element, a charge at a point of measurement located at a front side of the wafer, at different points of time that follow a start of the introducing of the voltage difference, to provide monitoring results; and (c) determining an electrical parameter of the contact between the wafer and the electrostatic chuck, based on the monitoring results.
    Type: Application
    Filed: December 8, 2020
    Publication date: June 9, 2022
    Applicant: APPLIED MATERIALS ISRAEL LTD.
    Inventors: Adam Faust, Yosef Basson, Guy Eytan, Yonathan David
  • Publication number: 20210408289
    Abstract: A transistor structure includes a first channel layer over a second channel layer, where the first and the second channel layers include monocrystalline silicon. An epitaxial source material is coupled to a first end of the first and second channel layers. An epitaxial drain material is coupled to a second end of the first and second channel layers, a gate electrode is between the epitaxial source material and the epitaxial drain material, and around the first channel layer and around the second channel layer. The transistor structure further includes a first gate dielectric layer between the gate electrode and each of the first channel layer and the second channel layer, where the first gate dielectric layer has a first dielectric constant. A second gate dielectric layer is between the first gate dielectric layer and the gate electrode, where the second gate dielectric layer has a second dielectric constant.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 30, 2021
    Applicant: Intel Corporation
    Inventors: Biswajeet Guha, Brian Greene, Robin Chao, Adam Faust, Chung-Hsun Lin, Curtis Tsai, Kevin Fischer