Abstract: An improved counter may implement dynamic frequency measurement while also remaining fully backwards compatible with traditional frequency measurement methods. The counter may operate according to low-frequency, large range, and/or high frequency modes of operation. It may be programmable with a divisor value associated with the large range operating mode, and a measurement time associated with the high frequency mode of operation. The divisor and measurement time settings may be enabled or disabled, and when either setting is disabled, the counter becomes backwards compatible with traditional frequency measurement methods. The counter may also be provided with inputs representative of the desired type of measurement and the minimum and maximum expected values for the signal to be measured. The counter may perform the frequency measurement according to any one or more of the operating modes, and return a measurement result obtained in the operating mode that completes the measurement first.

Abstract: An improved counter may implement dynamic frequency measurement while also remaining fully backwards compatible with traditional frequency measurement methods. The counter may operate according to low-frequency, large range, and/or high frequency modes of operation. It may be programmable with a divisor value associated with the large range operating mode, and a measurement time associated with the high frequency mode of operation. The divisor and measurement time settings may be enabled or disabled, and when either setting is disabled, the counter becomes backwards compatible with traditional frequency measurement methods. The counter may also be provided with inputs representative of the desired type of measurement and the minimum and maximum expected values for the signal to be measured. The counter may perform the frequency measurement according to any one or more of the operating modes, and return a measurement result obtained in the operating mode that completes the measurement first.

Abstract: An analog-to-digital-converter (ADC) timing engine may simplify the use of Delta-Sigma ADCs by compensating for the group-delay of the ADC. The compensation may render the group-delay corresponding to the ADC largely transparent to the end-user of the ADC. Therefore, multiple ADCs may be easily synchronized with each other, even if they have different group-delays, and they may further be synchronized with other types of ADCs that do not have group-delays. The data from the ADCs may also be synchronized with external events. The ADC timing engine (ATE) may be programmed with a number of parameters to set proper delays taking into account not only the group-delays corresponding to the various ADC, but delays stemming from a variety of other sources. Multiple ATEs may be synchronized with each other to ensure that data acquisition by the participating ADCs is started and/or stopped at the same point in time.

Abstract: Various embodiments of a system and method for performing a measurement application are described herein. The system may include a host computer having a processor, and a measurement device having a programmable hardware element. The programmable hardware element may be configured to perform a loop to acquire measurement data from a physical system. The host computer may be configured to perform another loop to read the measurement data from the programmable hardware element and use the measurement data in a measurement and control algorithm. The host computer may be further configured to perform a synchronization algorithm to keep the measurement data acquisition loop performed by the programmable hardware element synchronized with the measurement and control loop performed by the host computer.

Abstract: An analog-to-digital-converter (ADC) timing engine may simplify the use of Delta-Sigma ADCs by compensating for the group-delay of the ADC. The compensation may render the group-delay corresponding to the ADC largely transparent to the end-user of the ADC. Therefore, multiple ADCs may be easily synchronized with each other, even if they have different group-delays, and they may further be synchronized with other types of ADCs that do not have group-delays. The data from the ADCs may also be synchronized with external events. The ADC timing engine (ATE) may be programmed with a number of parameters to set proper delays taking into account not only the group-delays corresponding to the various ADC, but delays stemming from a variety of other sources. Multiple ATEs may be synchronized with each other to ensure that data acquisition by the participating ADCs is started and/or stopped at the same point in time.

Abstract: Various embodiments of a system and method for performing a measurement application are described herein. The system may include a host computer having a processor, and a measurement device having a programmable hardware element. The programmable hardware element may be configured to perform a loop to acquire measurement data from a physical system. The host computer may be configured to perform another loop to read the measurement data from the programmable hardware element and use the measurement data in a measurement and control algorithm. The host computer may be further configured to perform a synchronization algorithm to keep the measurement data acquisition loop performed by the programmable hardware element synchronized with the measurement and control loop performed by the host computer.