Abstract: The disclosure relates to a detector of infrared radiation which employs Group III-V compound semiconductor technology and includes a conductive substrate, of a material such as GaAs. Upon this substrate is deposited a lattice structure, including thin alternating layers of a wider and a narrower energy band gap material (AlGaAs and GaAs) periodically disposed. Upon this is deposited a layer of an alloyed semiconductor of moderate bandgap, into which photoexcited carriers are injected, and upon this is deposited a layer of wider bandgap material against which the carriers are trapped and thus collected. The lattice is designed so that the energy gap between the first two bands produced by the periodic structure is equal to the infrared photon energy. The doping is such as to nearly fill the first band with free carriers. Thus infrared radiation is efficiently absorbed, generating free carriers in the second band of the lattice.

Abstract: An infrared imager, wherein a transparent gate 14 is separated from a very narrow bandgap semiconductor 106 (such as HgCdTe) by a thin dielectric 15, 62. The gate 14 is biased to create a depletion well in the semiconductor 106, and photo-generated carriers are collected in the well. The gate voltage is sensed to measure the accumulated charge. Preferably the accumulated charge is not sensed directly from the gate, but the gate output is repeatedly averaged with another capacitor, so that the output of the imager is sensed as in average over a number of read cycles, which provides a greatly improved signal-to-noise ratio. Preferably an array of the MIS detection devices is formed in a thin layer of HgCdTe 106, which is bonded to a silicon substrate 107 containing a corresponding array of the averaging capacitors with addressing and output connections, and via holes 16 through the HgCdTe are used to connect each detection device to its corresponding averaging capacitor.

Abstract: A method for fabricating a metal insulator semiconductor includes first forming a substrate (10) having an array of switching elements formed therein. A plurality of deformable Indium pads (16) and (18) are then formed on the surface of the substrate and in contact with each of the switching elements. A superstrate is formed from a layer of mercury cadmium telluride (32) and a layer of dielectric insulating material (34). The superstrate is pressed down adjacent the substrate (10) with the upper surface of the conductive gates (16) and (18) contracting the lower surface of the dielectric layer (34). The deformable pads (16) and (18) conform to the lower surface of the dielectric layer (34). Epoxy (36) is then disposed in the interstices of the device to provide an adhesive force between the substrate (10) and the superstrate.

Abstract: An infrared imager, wherein an array of detection devices is formed in a thin layer of HgCdTe, which is bonded to a silicon substrate containing a corresponding array of averaging capacitors with addressing and output connections, and via holes through (or bump bonding pads on) the HgCdTe are used to connect each detection device to its corresponding averaging capacitor. The signal from each detection device is repeatedly averaged into its averaging capacitor, so that the output of each pixel site is sensed as an average over a number of read cycles which provides a greatly improved signal-to-noise ratio.

Abstract: An infrared imager, wherein a transparent gate is separated from a very narrow bandgap semiconductor (such as HgCdTe) by a thin dielectric. The gate is biased to create a depletion well in a semiconductor, and photo-generated carriers are collected in the well. The gate voltage is sensed to measure the accumulated charge. Preferably the accumulated charge is not sensed directly from the gate, but the gate output is repeatedly averaged with another capacitor, so that the output of the imager is sensed as an average over a number of read cycles, which provides a greatly improved signal-to-noise ratio. Preferably an array of the MIS detection devices is formed in a thin layer of HgCdTe, which is bonded to a silicon substrate containing a corresponding array of the averaging capacitors with addressing and output connections, and via holes through the HgCdTe are used to connect each detection device to its corresponding averaging capacitor.

Abstract: A method for fabricating a metal insulator semiconductor includes first forming a substrate (10) having an array of switching elements formed therein. A plurality of deformable Indium pads (16) and (18) are then formed on the surface of the substrate and in contact with each of the switching elements. A superstrate is formed from a layer of mercury cadmium telluride (32) and a layer of dielectric insulating material (34). The superstrate is pressed down adjacent the substrate (10) with the upper surface of the conductive gates (16) and (18) contacting the lower surface of the dielectric layer (34). The deformable pads (16) and (18) conform to the lower surface of the dielectric layer (34). Epoxy (36) is then disposed in the interstices of the device to provide an adhesive force between the substrate (10) and the superstrate.

Abstract: A charge injection device array is fabricated, having one row of devices optically opaqued. Device outputs are read using a correlated double sample technique. The voltage of an entire column of devices with a selected row addressed is measured. The same column of devices is again measured with signal of no row addressed. Therefore, the difference is the charge on the device in the row addressed. The output of each device in a column is referenced to the output of the device in the opaqued row of the column, or a set level, if no row is addressed.

Abstract: An infrared charge transfer device (CTD) imaging system is disclosed which includes an optic system for focusing infrared energy emanating from a scene, a detector matrix for receiving the focused infrared energy and converting it to electrical signals representative of the intensity of the infrared energy, and a video processor for processing the electrical signals into video signals. The detector matrix of the system is a plurality of IR detector cells arranged in rows and columns. Each detector cell includes a substrate of semiconductor material, an integrating electrode, a drain electrode, a transfer electrode and insulating layers. The integrating electrode is centrally disposed with respect to the drain and transfer electrodes with the integrating electrode in a spaced relationship with the drain electrode. The integrating and drain electrodes form first level MIS electrodes on the semiconductor substrate.