Patents by Inventor Adam J. Lewis, Jr.

Adam J. Lewis, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4779004
    Abstract: An infrared imager, wherein a transparent gate 14 is separated from a very narrow bandgap semiconductor 106 (such as HgCdTe) by a thin dielectric 15, 62. The gate 14 is biased to create a depletion well in the semiconductor 106, and photo-generated carriers are collected in the well. The gate voltage is sensed to measure the accumulated charge. Preferably the accumulated charge is not sensed directly from the gate, but the gate output is repeatedly averaged with another capacitor, so that the output of the imager is sensed as in average over a number of read cycles, which provides a greatly improved signal-to-noise ratio. Preferably an array of the MIS detection devices is formed in a thin layer of HgCdTe 106, which is bonded to a silicon substrate 107 containing a corresponding array of the averaging capacitors with addressing and output connections, and via holes 16 through the HgCdTe are used to connect each detection device to its corresponding averaging capacitor.
    Type: Grant
    Filed: August 4, 1987
    Date of Patent: October 18, 1988
    Assignee: Texas Instruments Incorporated
    Inventors: Claude E. Tew, Adam J. Lewis, Jr.
  • Patent number: 4686373
    Abstract: An infrared imager, wherein an array of detection devices is formed in a thin layer of HgCdTe, which is bonded to a silicon substrate containing a corresponding array of averaging capacitors with addressing and output connections, and via holes through (or bump bonding pads on) the HgCdTe are used to connect each detection device to its corresponding averaging capacitor. The signal from each detection device is repeatedly averaged into its averaging capacitor, so that the output of each pixel site is sensed as an average over a number of read cycles which provides a greatly improved signal-to-noise ratio.
    Type: Grant
    Filed: April 15, 1986
    Date of Patent: August 11, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Claude E. Tew, Adam J. Lewis, Jr.
  • Patent number: 4684812
    Abstract: An infrared imager, wherein a transparent gate is separated from a very narrow bandgap semiconductor (such as HgCdTe) by a thin dielectric. The gate is biased to create a depletion well in a semiconductor, and photo-generated carriers are collected in the well. The gate voltage is sensed to measure the accumulated charge. Preferably the accumulated charge is not sensed directly from the gate, but the gate output is repeatedly averaged with another capacitor, so that the output of the imager is sensed as an average over a number of read cycles, which provides a greatly improved signal-to-noise ratio. Preferably an array of the MIS detection devices is formed in a thin layer of HgCdTe, which is bonded to a silicon substrate containing a corresponding array of the averaging capacitors with addressing and output connections, and via holes through the HgCdTe are used to connect each detection device to its corresponding averaging capacitor.
    Type: Grant
    Filed: April 15, 1986
    Date of Patent: August 4, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Claude E. Tew, Adam J. Lewis, Jr.
  • Patent number: 4360732
    Abstract: An infrared charge transfer device (CTD) imaging system is disclosed which includes an optic system for focusing infrared energy emanating from a scene, a detector matrix for receiving the focused infrared energy and converting it to electrical signals representative of the intensity of the infrared energy, and a video processor for processing the electrical signals into video signals. The detector matrix of the system is a plurality of IR detector cells arranged in rows and columns. Each detector cell includes a substrate of semiconductor material, an integrating electrode, a drain electrode, a transfer electrode and insulating layers. The integrating electrode is centrally disposed with respect to the drain and transfer electrodes with the integrating electrode in a spaced relationship with the drain electrode. The integrating and drain electrodes form first level MIS electrodes on the semiconductor substrate.
    Type: Grant
    Filed: June 16, 1980
    Date of Patent: November 23, 1982
    Assignee: Texas Instruments Incorporated
    Inventors: Richard A. Chapman, Adam J. Lewis, Jr., Jaroslav Hynecek, Michael A. Kinch