Patents by Inventor Adam L. Shook
Adam L. Shook has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9866118Abstract: One embodiment includes a power supply system. The system includes a pulse-width modulation (PWM) system configured to generate a PWM signal. The system also includes a power stage comprising a gate driver, a high-side switch, and a low-side switch. The gate driver can be configured to alternately activate the high-side and low-side switches to provide an output signal to a load in response to the PWM signal, and to provide an activation dead-time between the alternate activation of the high-side and low-side switches. The system further includes a digital delay system configured to measure the activation dead-time and to add the measured activation dead-time to the activation of the high-side switch.Type: GrantFiled: March 22, 2016Date of Patent: January 9, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Adam L. Shook
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Publication number: 20160204775Abstract: One embodiment includes a power supply system. The system includes a pulse-width modulation (PWM) system configured to generate a PWM signal. The system also includes a power stage comprising a gate driver, a high-side switch, and a low-side switch. The gate driver can be configured to alternately activate the high-side and low-side switches to provide an output signal to a load in response to the PWM signal, and to provide an activation dead-time between the alternate activation of the high-side and low-side switches. The system further includes a digital delay system configured to measure the activation dead-time and to add the measured activation dead-time to the activation of the high-side switch.Type: ApplicationFiled: March 22, 2016Publication date: July 14, 2016Inventor: Adam L. Shook
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Patent number: 9325241Abstract: One embodiment includes a power supply system. The system includes a pulse-width modulation (PWM) system configured to generate a PWM signal. The system also includes a power stage comprising a gate driver, a high-side switch, and a low-side switch. The gate driver can be configured to alternately activate the high-side and low-side switches to provide an output signal to a load in response to the PWM signal, and to provide an activation dead-time between the alternate activation of the high-side and low-side switches. The system further includes a digital delay system configured to measure the activation dead-time and to add the measured activation dead-time to the activation of the high-side switch.Type: GrantFiled: August 3, 2015Date of Patent: April 26, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Adam L. Shook
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Publication number: 20150340953Abstract: One embodiment includes a power supply system. The system includes a pulse-width modulation (PWM) system configured to generate a PWM signal. The system also includes a power stage comprising a gate driver, a high-side switch, and a low-side switch. The gate driver can be configured to alternately activate the high-side and low-side switches to provide an output signal to a load in response to the PWM signal, and to provide an activation dead-time between the alternate activation of the high-side and low-side switches. The system further includes a digital delay system configured to measure the activation dead-time and to add the measured activation dead-time to the activation of the high-side switch.Type: ApplicationFiled: August 3, 2015Publication date: November 26, 2015Inventor: Adam L. Shook
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Patent number: 9130560Abstract: An apparatus, comprising a load; an output FET having a drain coupled to the load; a first and second of a pair strong FETs, wherein: a) a source of the first of the pair of the strong FETs is coupled to the load; b) a drain of the first pair of the strong FETs is coupled to the source of the second of the of the pair of the strong FETs; the drain of the second pair of the strong FETs is coupled to a gate of the output FET; and a fixed current mirror is coupled to the gate of the first of the pair of the strong FETs.Type: GrantFiled: January 30, 2013Date of Patent: September 8, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Adam L. Shook
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Patent number: 9128498Abstract: A power supply system (10) includes a pulse-width modulation (PWM) system (14) configured to generate a PWM signal. The system (10) also includes a power stage (16) comprising a gate driver (60), a high-side switch, and a low-side switch. The gate driver (60) can be configured to alternately activate the high-side and low-side switches to provide an output signal to a load (12) in response to the PWM signal, and to provide an activation dead-time between the alternate activation of the high-side and low-side switches. The system (10) further includes a digital delay system (18) configured to measure the activation dead-time and to add the measured activation dead-time to the activation of the high-side switch.Type: GrantFiled: January 30, 2013Date of Patent: September 8, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Adam L. Shook
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Patent number: 8901995Abstract: Sallen-Key active low pass filters (LPFs) have been knows for many years; however, these LPFs generally include passive components (i.e., resistors and capacitors) and active components (i.e., amplifiers) that are within the direct signal path that can contribute to the noise at the output of the filter within the pass band. Here, an LPF (which has the same general behavior as a Sallen-Key LPF) has been provided that AC couples passive components and active components to the direct signal path so as to suppress the noise contribution in the pass band.Type: GrantFiled: November 10, 2010Date of Patent: December 2, 2014Assignee: Texas Instruments IncorporatedInventor: Adam L. Shook
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Patent number: 8884674Abstract: An apparatus, comprising: a NFET current mirror having a first NFET and a second NFET; a PFET gate-coupled to the drain of the second NFET, wherein the PFET has a larger gain than the second NFET; a driver NFET having a gate that is coupled to the drain the PFET; wherein the second NFET is coupled through its source to the drain of the driver NFET.Type: GrantFiled: January 30, 2013Date of Patent: November 11, 2014Assignee: Texas Instruments IncorporatedInventor: Adam L. Shook
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Publication number: 20140210533Abstract: An apparatus, comprising: a NFET current mirror having a first NFET and a second NFET; a PFET gate-coupled to the drain of the second NFET, wherein the PFET has a larger gain than the second NFET; a driver NFET having a gate that is coupled to the drain the PFET; wherein the second NFET is coupled through its source to the drain of the driver NFET.Type: ApplicationFiled: January 30, 2013Publication date: July 31, 2014Applicant: Texas Instruments IncorporatedInventor: Adam L. Shook
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Publication number: 20140125389Abstract: An apparatus, comprising: a PMOS current mirror have a first PFET and a second PFET coupled at their respective gates; a first current source coupled to drain of the first PFET; a second current source configured to have a current that is greater than the first current source, coupled to the drain of the second PFET; a capacitor coupled to the gates of the PFET current mirror; a third PFET gate-coupled to the current mirror; a driver NFET having a gate coupled to the drain of the third PFET, wherein a drain of the driver NFET is coupled to the capacitor.Type: ApplicationFiled: January 30, 2013Publication date: May 8, 2014Applicant: Texas Instruments IncorporatedInventor: Adam L. Shook
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Patent number: 8717076Abstract: An apparatus, comprising: a PMOS current mirror have a first PFET and a second PFET coupled at their respective gates; a first current source coupled to drain of the first PFET; a second current source configured to have a current that is greater than the first current source, coupled to the drain of the second PFET; a capacitor coupled to the gates of the PFET current mirror; a third PFET gate-coupled to the current mirror; a driver NFET having a gate coupled to the drain of the third PFET, wherein a drain of the driver NFET is coupled to the capacitor.Type: GrantFiled: January 30, 2013Date of Patent: May 6, 2014Assignee: Texas Instruments IncorporatedInventor: Adam L. Shook
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Publication number: 20130234695Abstract: An apparatus, comprising a load; an output FET having a drain coupled to the load; a first and second of a pair strong FETs, wherein: a) a source of the first of the pair of the strong FETs is coupled to the load; b) a drain of the first pair of the strong FETs is coupled to the source of the second of the of the pair of the strong FETs; the drain of the second pair of the strong FETs is coupled to a gate of the output FET; and a fixed current mirror is coupled to the gate of the first of the pair of the strong FETs.Type: ApplicationFiled: January 30, 2013Publication date: September 12, 2013Inventor: Adam L. Shook
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Patent number: 8436676Abstract: Traditionally, charge pumps, which used flying capacitors, were limited to a maximum divide ratio of N+1 (where N is the number of flying capacitors). Here, however, a charge pump has been provided that allows for a dramatically increased divide ratio. Specifically, several switched capacitor circuits (which are controlled by a driver) allow for flying capacitors to be arranged to provide a maximum divide ratio of 3·2(N-1)?1.Type: GrantFiled: February 7, 2011Date of Patent: May 7, 2013Assignee: Texas Instruments IncorporatedInventors: Adam L. Shook, Byungchul Jang
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Publication number: 20120200340Abstract: Traditionally, charge pumps, which used flying capacitors, were limited to a maximum divide ratio of N+1 (where N is the number of flying capacitors). Here, however, a charge pump has been provided that allows for a dramatically increased divide ratio. Specifically, several switched capacitor circuits (which are controlled by a driver) allow for flying capacitors to be arranged to provide a maximum divide ratio of 3·2(N-1)?1.Type: ApplicationFiled: February 7, 2011Publication date: August 9, 2012Applicant: Texas Instruments IncorporatedInventors: Adam L. Shook, Byungchul Jang
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Publication number: 20120112826Abstract: Sallen-Key active low pass filters (LPFs) have been knows for many years; however, these LPFs generally include passive components (i.e., resistors and capacitors) and active components (i.e., amplifiers) that are within the direct signal path that can contribute to the noise at the output of the filter within the pass band. Here, an LPF (which has the same general behavior as a Sallen-Key LPF) has been provided that AC couples passive components and active components to the direct signal path so as to suppress the noise contribution in the pass band.Type: ApplicationFiled: November 10, 2010Publication date: May 10, 2012Applicant: Texas Instruments IncorporatedInventor: Adam L. Shook
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Patent number: 7965139Abstract: Conventional multistage amplifiers oftentimes employ trim circuits or highly matched components to combat noise and offset contributions. Having trim circuitry or highly matched components increases the overall size, cost, and power consumption, so it is desirable to have a circuit that reduces any need for better matching components or trim circuitry. Here, a multistage amplifier system is provided that generally accounts for some noise and offset contributions, reducing the need for better matching components and/or trim circuitry.Type: GrantFiled: March 5, 2010Date of Patent: June 21, 2011Assignee: Texas Instruments IncorporatedInventor: Adam L. Shook