Patents by Inventor Adam M. Conway
Adam M. Conway has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11942760Abstract: A high-voltage switch, whose operation leverages the speed of electrons to generate the “on” time of the pulse in combination with the speed of light to generate the “off” time of the pulse, is described. In one example, the high-voltage switch includes a first electrode, a second electrode spaced apart from the first electrode, a region of non-absorbing material occupying a portion of the space between the first and second electrodes and allowing a laser pulse to propagate therethrough without substantial absorption, and a region of absorbing material occupying another portion of the space and producing a charged particle cloud upon receiving the laser pulse. The high-voltage switch remains “on” upon the charged particle cloud reaching an electrode and until it has been collected by the electrode, and where the high-voltage switch remains “off” subsequent to the collection and until another generated charged particle cloud reaches the electrode.Type: GrantFiled: December 19, 2018Date of Patent: March 26, 2024Assignee: LAWRENCE LIVERMORE NATIONAL SECURITY, LLCInventors: Lars F. Voss, Adam M. Conway, John E. Heebner
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Publication number: 20230343542Abstract: Described herein is a traveling wave tube (TWT), comprising an electron gun configured to generate an electron beam (E-beam); a signal injector configured to generate a radio frequency (RF) signal; a slow wave structure (SWS) having an aperture configured to combine the E-beam and the RF signal; an outer wall enclosing the SWS; and at least one electromagnetically-active material on one of (1) at least one projection on at least one of a periphery of the SWS and on a side of the outer wall facing the SWS and (2) the periphery of the SWS configured to receive at least one electromagnetic signal to control, on-the-fly, amplification of the RF signal by maximizing dampening of spurious modes while minimizing dampening of operating modes.Type: ApplicationFiled: April 22, 2022Publication date: October 26, 2023Applicant: Raytheon CompanyInventors: David R. Sar, Adam M. Conway
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Patent number: 11522542Abstract: A high-voltage switch is adapted for use as a medium-voltage direct current circuit breaker, which provides a low-cost, small-footprint device to mitigate system faults. In one example, a method for operating a wideband optical device includes illuminating the wide bandgap optical device with a light within a first range of wavelengths and a first average intensity, allowing a current to propagate therethrough without substantial absorption of the current, illuminating the wide bandgap optical device with light within the first range of wavelengths and a second average intensity that is lower than the first average intensity to allow a sustained current flow though the wide bandgap optical device, and illuminating the wide bandgap optical device with light within a second range of wavelengths to stop or substantially restrict propagation of the current through the wide gap material.Type: GrantFiled: June 3, 2019Date of Patent: December 6, 2022Assignee: LAWRENCE LIVERMORE NATIONAL SECURITY, LLCInventors: Lars F. Voss, Adam M. Conway
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Publication number: 20220352889Abstract: A high-voltage switch is adapted for use as a medium-voltage direct current circuit breaker, which provides a low-cost, small-footprint device to mitigate system faults. In one example, a method for operating a wideb and optical device includes illuminating the wide bandgap optical device with a light within a first range of wavelengths and a first average intensity, allowing a current to propagate therethrough without substantial absorption of the current, illuminating the wide bandgap optical device with light within the first range of wavelengths and a second average intensity that is lower than the first average intensity to allow a sustained current flow though the wide bandgap optical device, and illuminating the wide bandgap optical device with light within a second range of wavelengths to stop or substantially restrict propagation of the current through the wide gap material.Type: ApplicationFiled: July 12, 2022Publication date: November 3, 2022Inventors: Lars F. Voss, Adam M. Conway
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Patent number: 11322626Abstract: Devices, methods and techniques are disclosed for providing a multi-layer diode without voids between layers. In one example aspect, a multi-stack diode includes at least two Drift Step Recovery Diodes (DSRDs). Each DSRD comprises a first layer having a first type of dopant, a second layer forming a region with at least ten times lower concentration of dopants compared to the adjacent layers, and a third layer having a second type of dopant that is opposite to the first type of dopant. The first layer of a second DSRD is positioned on top of the third layer of first DSRD. The first layer of the second DSRD and the third layer of the first DSRD are degenerate to form a tunneling diode at an interface of the first DSRD and second DSRD, the tunneling diode demonstrating a linear current-voltage characteristic.Type: GrantFiled: October 27, 2020Date of Patent: May 3, 2022Assignees: Lawrence Livermore National Security, LLC, BAE Systems Land & Armaments L.P., The Government of the United States, as represented by the Secretary of the ArmyInventors: Lars F. Voss, Adam M. Conway, Luis M. Hernandez, Mark S. Rader
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Publication number: 20220040463Abstract: A product includes an elongated carbon-containing pillar having a bottom and a tip opposite the bottom. The width of the pillar measured 1 nm below the tip is less than 700 nm. A method includes masking a carbon-containing single crystal for defining masked regions and unmasked regions on the single crystal. The method also includes performing a plasma etch for removing portions of the unmasked regions of the single crystal, thereby defining a pillar in each unmasked region, and performing a chemical etch on the pillars at a temperature between 1200° C. and 1600° C. for selectively reducing a width of each pillar.Type: ApplicationFiled: August 6, 2020Publication date: February 10, 2022Inventors: Clint D. Frye, Mihail Bora, Adam M. Conway, Devin Joseph Funaro, Paulius Vytautas Grivickas, David L. Hall, Lars F. Voss
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Publication number: 20210336131Abstract: A high-voltage switch, whose operation leverages the speed of electrons to generate the “on” time of the pulse in combination with the speed of light to generate the “off” time of the pulse, is described. In one example, the high-voltage switch includes a first electrode, a second electrode spaced apart from the first electrode, a region of non-absorbing material occupying a portion of the space between the first and second electrodes and allowing a laser pulse to propagate therethrough without substantial absorption, and a region of absorbing material occupying another portion of the space and producing a charged particle cloud upon receiving the laser pulse. The high-voltage switch remains “on” upon the charged particle cloud reaching an electrode and until it has been collected by the electrode, and where the high-voltage switch remains “off” subsequent to the collection and until another generated charged particle cloud reaches the electrode.Type: ApplicationFiled: December 19, 2018Publication date: October 28, 2021Inventors: Lars F. Voss, Adam M. Conway, John E. Heebner
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Publication number: 20210126136Abstract: Devices, methods and techniques are disclosed for providing a multi-layer diode without voids between layers. In one example aspect, a multi-stack diode includes at least two Drift Step Recovery Diodes (DSRDs). Each DSRD comprises a first layer having a first type of dopant, a second layer forming a region with at least ten times lower concentration of dopants compared to the adjacent layers, and a third layer having a second type of dopant that is opposite to the first type of dopant. The first layer of a second DSRD is positioned on top of the third layer of first DSRD. The first layer of the second DSRD and the third layer of the first DSRD are degenerate to form a tunneling diode at an interface of the first DSRD and second DSRD, the tunneling diode demonstrating a linear current-voltage characteristic.Type: ApplicationFiled: October 27, 2020Publication date: April 29, 2021Inventors: Lars F. Voss, Adam M. Conway
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Publication number: 20200382118Abstract: A high-voltage switch is adapted for use as a medium-voltage direct current circuit breaker, which provides a low-cost, small-footprint device to mitigate system faults. In one example, a method for operating a wideband optical device includes illuminating the wide bandgap optical device with a light within a first range of wavelengths and a first average intensity, allowing a current to propagate therethrough without substantial absorption of the current, illuminating the wide bandgap optical device with light within the first range of wavelengths and a second average intensity that is lower than the first average intensity to allow a sustained current flow though the wide bandgap optical device, and illuminating the wide bandgap optical device with light within a second range of wavelengths to stop or substantially restrict propagation of the current through the wide gap material.Type: ApplicationFiled: June 3, 2019Publication date: December 3, 2020Inventors: Lars F. Voss, Adam M. Conway
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Patent number: 8829460Abstract: Three-dimensional boron particle loaded thermal neutron detectors utilize neutron sensitive conversion materials in the form of nano-powders and micro-sized particles, as opposed to thin films, suspensions, paraffin, etc. More specifically, methods to infiltrate, intersperse and embed the neutron nano-powders to form two-dimensional and/or three-dimensional charge sensitive platforms are specified. The use of nano-powders enables conformal contact with the entire charge-collecting structure regardless of its shape or configuration.Type: GrantFiled: July 18, 2012Date of Patent: September 9, 2014Assignee: Lawrence Livermore National Security, LLCInventors: Rebecca J. Nikolic, Adam M. Conway, Robert T. Graff, Joshua D. Kuntz, Catherine Reinhardt, Lars F. Voss, Chin Li Cheung, Daniel Heineck
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Patent number: 8558188Abstract: Methods for manufacturing solid-state thermal neutron detectors with simultaneous high thermal neutron detection efficiency (>50%) and neutron to gamma discrimination (>104) are provided. A structure is provided that includes a p+ region on a first side of an intrinsic region and an n+ region on a second side of the intrinsic region. The thickness of the intrinsic region is minimized to achieve a desired gamma discrimination factor of at least 1.0E+04. Material is removed from one of the p+ region or the n+ region and into the intrinsic layer to produce pillars with open space between each pillar. The open space is filed with a neutron sensitive material. An electrode is placed in contact with the pillars and another electrode is placed in contact with the side that is opposite of the intrinsic layer with respect to the first electrode.Type: GrantFiled: April 25, 2012Date of Patent: October 15, 2013Assignee: Lawrence Livermore National Security, LLCInventors: Rebecca J. Nikolic, Adam M. Conway, Daniel Heineck, Lars F. Voss, Tzu Fang Wang, Qinghui Shao
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Publication number: 20130075848Abstract: Three-dimensional boron particle loaded thermal neutron detectors utilize neutron sensitive conversion materials in the form of nano-powders and micro-sized particles, as opposed to thin films, suspensions, paraffin, etc. More specifically, methods to infiltrate, intersperse and embed the neutron nano-powders to form two-dimensional and/or three-dimensional charge sensitive platforms are specified. The use of nano-powders enables conformal contact with the entire charge-collecting structure regardless of its shape or configuration.Type: ApplicationFiled: July 18, 2012Publication date: March 28, 2013Applicant: Lawrence Livermore National Security, LLcInventors: Rebecca J. Nikolic, Adam M. Conway, Robert T. Graff, Joshua D. Kuntz, Catherine Reinhardt, Lars F. Voss, Chin Li Cheung, Daniel Heineck
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Patent number: 8314400Abstract: Methods for fabricating three-dimensional PIN structures having conformal electrodes are provided, as well as the structures themselves. The structures include a first layer and an array of pillars with cavity regions between the pillars. A first end of each pillar is in contact with the first layer. A segment is formed on the second end of each pillar. The cavity regions are filled with a fill material, which may be a functional material such as a neutron sensitive material. The fill material covers each segment. A portion of the fill material is etched back to produce an exposed portion of the segment. A first electrode is deposited onto the fill material and each exposed segment, thereby forming a conductive layer that provides a common contact to each the exposed segment. A second electrode is deposited onto the first layer.Type: GrantFiled: January 27, 2011Date of Patent: November 20, 2012Assignee: Lawrence Livermore National Security, LLCInventors: Rebecca J. Nikolic, Adam M. Conway, Robert T. Graff, Catherine Reinhardt, Lars F. Voss, Qinghui Shao
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Publication number: 20120235260Abstract: Methods for manufacturing solid-state thermal neutron detectors with simultaneous high thermal neutron detection efficiency (>50%) and neutron to gamma discrimination (>104) are provided. A structure is provided that includes a p+ region on a first side of an intrinsic region and an n+ region on a second side of the intrinsic region. The thickness of the intrinsic region is minimized to achieve a desired gamma discrimination factor of at least 1.0E+04. Material is removed from one of the p+ region or the n+ region and into the intrinsic layer to produce pillars with open space between each pillar. The open space is filed with a neutron sensitive material. An electrode is placed in contact with the pillars and another electrode is placed in contact with the side that is opposite of the intrinsic layer with respect to the first electrode.Type: ApplicationFiled: April 25, 2012Publication date: September 20, 2012Applicant: Lawrence Livermore National Security, LLCInventors: Rebecca J. Nikolic, Adam M. Conway, Daniel Heineck, Lars F. Voss, Tzu Fang Wang, Qinghui Shao
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Patent number: 8258482Abstract: In one embodiment, a system comprises a semiconductor gamma detector material and a hole blocking layer adjacent the gamma detector material, the hole blocking layer resisting passage of holes therethrough. In another embodiment, a system comprises a semiconductor gamma detector material, and an electron blocking layer adjacent the gamma detector material, the electron blocking layer resisting passage of electrons therethrough, wherein the electron blocking layer comprises undoped HgCdTe. In another embodiment, a method comprises forming a hole blocking layer adjacent a semiconductor gamma detector material, the hole blocking layer resisting passage of holes therethrough. Additional systems and methods are also presented.Type: GrantFiled: May 26, 2009Date of Patent: September 4, 2012Assignee: Lawrence Livermore National Security, LLCInventors: Rebecca J. Nikolic, Adam M. Conway, Art J. Nelson, Stephen A. Payne
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Publication number: 20120043632Abstract: Methods for fabricating three-dimentional PIN structures having conformal electrodes are provided, as well as the structures themselves. The structures include a first layer and an array of pillars with cavity regions between the pillars. A first end of each pillar is in contact with the first layer. A segment is formed on the second end of each pillar. The cavity regions are filled with a fill material, which may be a functional material such as a neutron sensitive material. The fill material covers each segment. A portion of the fill material is etched back to produce an exposed portion of the segment. A first electrode is deposited onto the fill material and each exposed segment, thereby forming a conductive layer that provides a common contact to each the exposed segment. A second electrode is deposited onto the first layer.Type: ApplicationFiled: January 27, 2011Publication date: February 23, 2012Inventors: Rebecca J. Nikolic, Adam M. Conway, Robert T. Graff, Catherine Reinhardt, Lars F. Voss, Qinghui Shao
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Publication number: 20090294680Abstract: In one embodiment, a system comprises a semiconductor gamma detector material and a hole blocking layer adjacent the gamma detector material, the hole blocking layer resisting passage of holes therethrough. In another embodiment, a system comprises a semiconductor gamma detector material, and an electron blocking layer adjacent the gamma detector material, the electron blocking layer resisting passage of electrons therethrough, wherein the electron blocking layer comprises undoped HgCdTe. In another embodiment, a method comprises forming a hole blocking layer adjacent a semiconductor gamma detector material, the hole blocking layer resisting passage of holes therethrough. Additional systems and methods are also presented.Type: ApplicationFiled: May 26, 2009Publication date: December 3, 2009Inventors: Rebecca J. Nikolic, Adam M. Conway, Art J. Nelson, Stephen A. Payne