Patents by Inventor Adam M. Kennedy
Adam M. Kennedy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12094604Abstract: The present disclosure relates to aggregating and sharing wellness data. The wellness data can be received by a user device from any number of sensors external or internal to the user device, from a user manually entering the wellness data, or from other users or entities. The user device can securely store the wellness data on the user device and transmit the wellness data to be stored on a remote database. A user of the device can share some or all of the wellness data with friends, relatives, caregivers, healthcare providers, or the like. The user device can further display a user's wellness data in an aggregated view of different types of wellness data. Wellness data of other users can also be viewed if authorizations from those users have been received.Type: GrantFiled: September 23, 2022Date of Patent: September 17, 2024Assignee: Apple Inc.Inventors: Anton M. Davydov, Adam L. Beberg, Dylan R. Edwards, Zachery W. Kennedy, Zachury B. Minjack, Afshad M. Mistri, Dennis S. Park, Lawrence Y. Yang
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Patent number: 12080421Abstract: The present disclosure relates to aggregating and sharing wellness data. The wellness data can be received by a user device from any number of sensors external or internal to the user device, from a user manually entering the wellness data, or from other users or entities. The user device can securely store the wellness data on the user device and transmit the wellness data to be stored on a remote database. A user of the device can share some or all of the wellness data with friends, relatives, caregivers, healthcare providers, or the like. The user device can further display a user's wellness data in an aggregated view of different types of wellness data. Wellness data of other users can also be viewed if authorizations from those users have been received.Type: GrantFiled: May 3, 2022Date of Patent: September 3, 2024Assignee: Apple Inc.Inventors: Aroon Pahwa, Adam L. Beberg, Anton M. Davydov, Dylan R. Edwards, Christine M. Eun, Stephanie M. Greer, Daniel S. Keen, Zachery W. Kennedy, Stephen O. Lemay, Kevin M. Lynch, Natalia C. Maric, Zachury B. Minjack, Afshad M. Mistri, Divya Nag, Gregory B. Novick, Michael O'Reilly, Dennis S. Park, Donald W. Pitschel, Christopher D. Soli, Rebecca L. Weber, Lawrence Y. Yang, Jay K. Blahnik
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Patent number: 11750945Abstract: An imaging and asynchronous laser pulse detector (ALPD) device, imaging cell of the imaging and ALPD device and method of use is disclosed. A detector generates an electrical signal in response to receiving an optical signal, wherein a frequency of the electrical signal is indicative of a frequency of the optical signal. A first detection/readout circuit is sensitive to a first frequency range, and a second detection/readout circuit is sensitive to a second frequency range. The first detection/readout circuit allows the electrical signal to pass from the first detection/readout circuit to the second detection/readout circuit.Type: GrantFiled: January 22, 2020Date of Patent: September 5, 2023Assignee: RAYTHEON COMPANYInventors: Adam M. Kennedy, Michael J. Batinica, Scott M. Taylor, Sean P. Kilcoyne, Paul Bryant
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Publication number: 20220310690Abstract: A focal plane array includes a mosaic integrated circuit device having a plurality of discrete integrated circuit tiles mounted on a motherboard. The focal plane array includes an optically continuous detector array electrically connected to the mosaic integrated circuit device with an interposer disposed therebetween. The interposer is configured to adjust a pitch of the continuous detector array to match a pitch of each of the plurality of discrete integrated circuit tiles so that the optical gaps between each of the plurality of integrated circuit tiles on the motherboard are minimized and the detector array is optically continuous, having high yield over the large format focal plane array.Type: ApplicationFiled: March 25, 2021Publication date: September 29, 2022Inventors: David J. Gulbransen, Sean P. Kilcoyne, Eric Miller, Matthew D. Chambers, Eric J. Beuville, Andrew E. Gin, Adam M. Kennedy
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Patent number: 11284025Abstract: A digital pixel includes a capacitive transimpedance amplifier (CTIA) coupled to a photodiode that receives an electrical charge and output an integration voltage. An integration capacitor coupled to the CTIA accumulates the integration voltage over an integration period. A comparator compares the accumulated integration voltage with a threshold voltage and generates a control signal at a first level each time the accumulated integration voltage is greater than the threshold voltage. A charge subtraction circuit receives the control signal at the first level and discharges the accumulated integration voltage each time the control signal at the first level is received from the comparator. An analog or digital counter receives the control signal at the first level and adjusts a counter value each time the control signal is received from the comparator. An output interface communicates the counter value to an image processing circuit at an end of the integration period.Type: GrantFiled: June 2, 2020Date of Patent: March 22, 2022Assignee: Raytheon CompanyInventors: Neil R. Malone, Micky Harris, Adam M. Kennedy, George Paloczi, John L. Vampola, Christian M. Boemler
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Publication number: 20210377470Abstract: A digital pixel includes a capacitive transimpedence amplifier (CTIA) coupled to a photodiode that receives an electrical charge and output an integration voltage. An integration capacitor coupled to the CTIA accumulates the integration voltage over an integration period. A comparator compares the accumulated integration voltage with a threshold voltage and generates a control signal at a first level each time the accumulated integration voltage is greater than the threshold voltage. A charge subtraction circuit receives the control signal at the first level and discharges the accumulated integration voltage each time the control signal at the first level is received from the comparator. An analog or digital counter receives the control signal at the first level and adjusts a counter value each time the control signal is received from the comparator. An output interface communicates the counter value to an image processing circuit at an end of the integration period.Type: ApplicationFiled: June 2, 2020Publication date: December 2, 2021Applicant: Raytheon CompanyInventors: Neil R. Malone, Micky Harris, Adam M. Kennedy, George Paloczi, John L. Vampola, Christian M. Boemler
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Publication number: 20210227158Abstract: An imaging and asynchronous laser pulse detector (ALPD) device, imaging cell of the imaging and ALPD device and method of use is disclosed. A detector generates an electrical signal in response to receiving an optical signal, wherein a frequency of the electrical signal is indicative of a frequency of the optical signal. A first detection/readout circuit is sensitive to a first frequency range, and a second detection/readout circuit is sensitive to a second frequency range. The first detection/readout circuit allows the electrical signal to pass from the first detection/readout circuit to the second detection/readout circuit.Type: ApplicationFiled: January 22, 2020Publication date: July 22, 2021Inventors: Adam M. Kennedy, Michael J. Batinica, Scott M. Taylor, Sean P. Kilcoyne, Paul Bryant
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Patent number: 10451487Abstract: Microbolometer arrays incorporating per-pixel dark reference structures for non-uniformity correction.Type: GrantFiled: August 23, 2018Date of Patent: October 22, 2019Assignee: RAYTHEON COMPANYInventors: Adam M. Kennedy, Eli E. Gordon, Eric J. Beuville, Ryan Paul Boesch, Jeffrey K. Hamers
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Patent number: 10315918Abstract: Methods for reducing wafer bow induced by an anti-reflective coating of a cap wafer are provided. The method may utilize a shadow mask having at least one opening therein that is positioned opposite recessed regions in a cap wafer. The method may further include depositing at least one layer of an anti-reflective coating material through the shadow mask onto a planar side of a cap wafer to provide a discontinuous coating on the planar side.Type: GrantFiled: August 3, 2016Date of Patent: June 11, 2019Assignee: RAYTHEON COMPANYInventors: Roland W. Gooch, Buu Q. Diep, Stephen H. Black, Thomas A. Kocian, Adam M. Kennedy
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Patent number: 10267997Abstract: A scene projector including an array of light emitting pixels, a tunable filter element, and a spatial light modulator. The tunable filter element is optically coupled to the array of light emitting pixels such that light emitted from the array of light emitting pixels is passed through the tunable filter element as filtered light. The spatial light modulator is optically coupled to the array of light emitting pixels and is configured to generate transmitted light by interacting with the filtered light to control at least one of an amplitude, a phase, and a polarization of the filtered light.Type: GrantFiled: November 11, 2015Date of Patent: April 23, 2019Assignee: RAYTHEON COMPANYInventors: Justin Gordon Adams Wehner, Duane D. Smith, Edward Peter Gordon Smith, Adam M. Kennedy
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Patent number: 10262913Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.Type: GrantFiled: April 2, 2018Date of Patent: April 16, 2019Assignee: RAYTHEON COMPANYInventors: Roland W. Gooch, Buu Q. Diep, Adam M. Kennedy, Stephen H. Black, Thomas A. Kocian
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Publication number: 20180226309Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.Type: ApplicationFiled: April 2, 2018Publication date: August 9, 2018Inventors: Roland W. Gooch, Buu Q. Diep, Adam M. Kennedy, Stephen H. Black, Thomas A. Kocian
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Patent number: 9969610Abstract: A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.Type: GrantFiled: January 26, 2017Date of Patent: May 15, 2018Assignee: RAYTHEON COMPANYInventors: Buu Q. Diep, Adam M. Kennedy, Thomas Allan Kocian, Mark Lamb
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Patent number: 9966320Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.Type: GrantFiled: September 20, 2016Date of Patent: May 8, 2018Assignee: RAYTHEON COMPANYInventors: Roland W. Gooch, Buu Q. Diep, Adam M. Kennedy, Stephen H. Black, Thomas A. Kocian
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Patent number: 9865519Abstract: A system and method for forming a wafer level package. In one example, a substrate used in the wafer level package includes a surface defined by a wafer level package (WLP) region and an external region, and a layer of getter material is disposed on at least a portion of the external region. According to one embodiment, the external region comprises a saw-to-reveal (STR) region of the wafer.Type: GrantFiled: January 10, 2017Date of Patent: January 9, 2018Assignee: RAYTHEON COMPANYInventors: Stephen H. Black, Adam M. Kennedy
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Patent number: 9771258Abstract: A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.Type: GrantFiled: June 24, 2015Date of Patent: September 26, 2017Assignee: RAYTHEON COMPANYInventors: Buu Q. Diep, Adam M. Kennedy, Thomas Allan Kocian, Mark Lamb
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Patent number: 9708181Abstract: A sealed package having a device disposed on a wafer structure and a lid structure boned to the device wafer. The device wafer includes: a substrate; a metal ring disposed on a surface portion of substrate around the device and a bonding material disposed on the metal ring. The metal ring extends laterally beyond at least one of an inner and outer edge of the bonding material. A first layer of the metal ring includes a stress relief buffer layer having a higher ductility than that of the surface portion of the substrate and a width greater than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relief buffer layer has a coefficient of thermal expansion greater than the coefficient of expansion of the surface portion of the substrate and less than the coefficient of expansion of the bonding material.Type: GrantFiled: February 19, 2016Date of Patent: July 18, 2017Assignee: Raytheon CompanyInventors: Adam M. Kennedy, Buu Q. Diep, Stephen H. Black, Tse E. Wong, Thomas Allan Kocian, Gregory D. Tracy
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Publication number: 20170148695Abstract: A surface defined by a wafer level package (WLP) region and an external region, and A system and method for forming a wafer level package. In one example, a substrate used in the wafer level package includes a layer of getter material is disposed on at least a portion of the external region. According to one embodiment, the external region comprises a saw-to-reveal (STR) region of the wafer.Type: ApplicationFiled: January 10, 2017Publication date: May 25, 2017Inventors: Stephen H. Black, Adam M. Kennedy
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Publication number: 20170129775Abstract: A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.Type: ApplicationFiled: January 26, 2017Publication date: May 11, 2017Inventors: Buu Q. Diep, Adam M. Kennedy, Thomas Allan Kocian, Mark Lamb
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Publication number: 20170131475Abstract: A scene projector including an array of light emitting pixels, a tunable filter element, and a spatial light modulator. The tunable filter element is optically coupled to the array of light emitting pixels such that light emitted from the array of light emitting pixels is passed through the tunable filter element as filtered light. The spatial light modulator is optically coupled to the array of light emitting pixels and is configured to generate transmitted light by interacting with the filtered light to control at least one of an amplitude, a phase, and a polarization of the filtered light.Type: ApplicationFiled: November 11, 2015Publication date: May 11, 2017Inventors: Justin Gordon Adams Wehner, Duane D. Smith, Edward Peter Gordon Smith, Adam M. Kennedy