Patents by Inventor Adam Olson
Adam Olson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260029115Abstract: A light fixture assembly for assembly into a ceiling component channel includes an elongated tray with a base with a first side, a second side and a first opening. The base has first and second longitudinally extending walls extending from the second side. The first longitudinally extending wall has a first coupler. The second longitudinally extending wall has a second coupler extending inwardly toward the first longitudinally extending wall. A first adjustable bracket includes a first portion coupled to the first coupler and a second portion coupled to the second coupler. The first portion and the second portion couple the elongated tray to the ceiling component channel. The light fixture assembly further includes a light assembly. A coupling assembly couples the light assembly to the elongated tray. The coupling assembly is positioned around the first opening and adjacent to the second side of the base.Type: ApplicationFiled: October 2, 2025Publication date: January 29, 2026Inventors: Brian BECK, Mark KNOWLES, Adam OLSON
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Publication number: 20250237369Abstract: A light fixture assembly includes a housing comprising a first wall having a first opening therethrough. A light assembly is disposed at least partially within and coupled to the housing. A bracket has a second opening therethrough. A sensor housing has a first portion sized greater than the opening and a second portion received within the opening. The second portion has a retainer for retaining the sensor housing within the second opening of the bracket. A releasable fastener secures the bracket to the first wall.Type: ApplicationFiled: December 30, 2024Publication date: July 24, 2025Inventors: Adam OLSON, Benjamin KARPEN
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Publication number: 20240366657Abstract: Disclosed are oral veterinary suspensions for delivering supplemental iron to a neonatal animal. The oral veterinary suspensions comprise water, an iron salt that is iron fumarate, iron sulfate, or a combination thereof suspended in the water, and a suspending agent. Also disclosed are methods of treating or preventing iron deficiencies to neonatal animals, as well as uses of the oral veterinary suspensions.Type: ApplicationFiled: March 25, 2022Publication date: November 7, 2024Inventors: Merle Olson, Adam Olson, David Ireland
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Patent number: 10656064Abstract: Embodiments of a quantifying force management system generally include a force applicator, a force indicator, and a force application assembly that includes a housing having an internal bore, a housing cap, and a force translator. In various embodiments, a portion of the force applicator extends through a housing cap opening wherein a force applicator bottom surface contacts a force translator top surface within the housing bore and whereby upon application of longitudinal force via the force applicator the force translator is compressed, and wherein the force indicator indicates the quantity of force being applied. In one aspect, embodiments of the quantifying force management system are incorporated in a piston assembly for use with a pressurized fluid density balance. A method of using the quantifying force management system, as a component of the piston assembly, in measuring the density of a liquid sample utilizing a fluid density balance is also provided.Type: GrantFiled: May 22, 2018Date of Patent: May 19, 2020Assignee: OFI Testing Equipment, Inc.Inventors: John D. Norwood, Virgilio Go Boncan, Kevin Madsen, Adam Olson
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Publication number: 20180340875Abstract: Embodiments of a quantifying force management system generally include a force applicator, a force indicator, and a force application assembly that includes a housing having an internal bore, a housing cap, and a force translator. In various embodiments, a portion of the force applicator extends through a housing cap opening wherein a force applicator bottom surface contacts a force translator top surface within the housing bore and whereby upon application of longitudinal force via the force applicator the force translator is compressed, and wherein the force indicator indicates the quantity of force being applied. In one aspect, embodiments of the quantifying force management system are incorporated in a piston assembly for use with a pressurized fluid density balance. A method of using the quantifying force management system, as a component of the piston assembly, in measuring the density of a liquid sample utilizing a fluid density balance is also provided.Type: ApplicationFiled: May 22, 2018Publication date: November 29, 2018Applicant: OFI Testing Equipment, Inc.Inventors: John D. Norwood, Virgilio Go Boncan, Kevin Madsen, Adam Olson
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Patent number: 9418848Abstract: Some embodiments include methods of forming patterns. A first mask is formed over a material. The first mask has features extending therein and defines a first pattern. The first pattern has a first level of uniformity across a distribution of the features. A brush layer is formed across the first mask and within the features to narrow the features and create a second mask from the first mask. The second mask has a second level of uniformity across the narrowed features which is greater than the first level of uniformity. A pattern is transferred from the second mask into the material.Type: GrantFiled: October 1, 2015Date of Patent: August 16, 2016Assignees: Micron Technology, Inc., Dow Global Technologies LLC, Rohm and Haas Electronic Materials LLCInventors: William R. Brown, Adam Olson, Kaveri Jain, Ho Seop Eom, Xue Gloria Chen, Nik Mirin, Dan Millward, Peter Trefonas, III, Phillip Dene Hustad, Jong Keun Park, Christopher Nam Lee
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Publication number: 20160027638Abstract: Some embodiments include methods of forming patterns. A first mask is formed over a material. The first mask has features extending therein and defines a first pattern. The first pattern has a first level of uniformity across a distribution of the features. A brush layer is formed across the first mask and within the features to narrow the features and create a second mask from the first mask. The second mask has a second level of uniformity across the narrowed features which is greater than the first level of uniformity. A pattern is transferred from the second mask into the material.Type: ApplicationFiled: October 1, 2015Publication date: January 28, 2016Inventors: William R. Brown, Adam Olson, Kaveri Jain, Ho Seop Eom, Xue Gloria Chen, Nik Mirin, Dan Millward, Peter Trefonas, III, Phillip Dene Hustad, Jong Keun Park, Christopher Nam Lee
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Patent number: 9184058Abstract: Some embodiments include methods of forming patterns. A first mask is formed over a material. The first mask has features extending therein and defines a first pattern. The first pattern has a first level of uniformity across a distribution of the features. A brush layer is formed across the first mask and within the features to narrow the features and create a second mask from the first mask. The second mask has a second level of uniformity across the narrowed features which is greater than the first level of uniformity. A pattern is transferred from the second mask into the material.Type: GrantFiled: December 23, 2013Date of Patent: November 10, 2015Assignee: Micron Technology, Inc.Inventors: William R. Brown, Adam Olson, Kaveri Jain, Ho Seop Eom, Xue Gloria Chen, Nik Mirin, Dan Millward, Peter Trefonas, III, Phillip Dene Hustad, Jong Keun Park, Christopher Nam Lee
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Publication number: 20150179467Abstract: Some embodiments include methods of forming patterns. A first mask is formed over a material. The first mask has features extending therein and defines a first pattern. The first pattern has a first level of uniformity across a distribution of the features. A brush layer is formed across the first mask and within the features to narrow the features and create a second mask from the first mask. The second mask has a second level of uniformity across the narrowed features which is greater than the first level of uniformity. A pattern is transferred from the second mask into the material.Type: ApplicationFiled: December 23, 2013Publication date: June 25, 2015Applicants: Micron Technology, Inc., Rohm and Haas Electronic Materials LLC, Dow Global Technologies LLCInventors: William R. Brown, Adam Olson, Kaveri Jain, Ho Seop Eom, Xue Gloria Chen, Nik Mirin, Dan Millward, Peter Trefonas, III, Phillip Dene Hustad, Jong Keun Park, Christopher Nam Lee
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Patent number: 8956976Abstract: A method of processing a semiconductor substrate in forming scribe line alignment marks includes forming pitch multiplied non-circuitry features within scribe line area of a semiconductor substrate. Individual of the features, in cross-section, have a maximum width which is less than a minimum photolithographic feature dimension used in lithographically patterning the substrate. Photoresist is deposited over the features. Such is patterned to form photoresist blocks that are individually received between a respective pair of the features in the cross-section. Individual of the features of the respective pairs have a laterally innermost sidewall in the cross-section. Individual of the photoresist blocks have an opposing pair of first pattern edges in the cross-section that are spaced laterally inward of the laterally innermost sidewalls of the respective pair of the features.Type: GrantFiled: February 4, 2014Date of Patent: February 17, 2015Assignee: Micron Technology, Inc.Inventors: William R. Brown, David Kewley, Adam Olson
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Patent number: 8859195Abstract: A method of lithographically patterning a substrate that has photoresist having removal areas and non-removal areas includes first exposing at least the non-removal areas to radiation effective to increase outer surface roughness of the photoresist in the non-removal areas at least post-develop but ineffective to change photoresist solubility in a developer for the photoresist to be cleared from the non-removal areas upon develop with the developer. Second exposing of radiation to the removal areas is conducted to be effective to change photoresist solubility in the developer for the photoresist to be cleared from the removal areas upon develop with the developer. The photoresist is developed with the developer effective to clear photoresist from the removal areas and to leave photoresist in the non-removal areas that has outer surface roughness in the non-removal areas which is greater than that before the first exposing. Other implementations and embodiments are contemplated.Type: GrantFiled: October 24, 2012Date of Patent: October 14, 2014Assignee: Micron Technology, Inc.Inventors: Yoshiki Hishiro, Scott Sills, Hiroyuki Mori, Troy Gugel, Paul D. Shirley, Lijing Gou, Adam Olson
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Publication number: 20140154886Abstract: A method of processing a semiconductor substrate in forming scribe line alignment marks includes forming pitch multiplied non-circuitry features within scribe line area of a semiconductor substrate. Individual of the features, in cross-section, have a maximum width which is less than a minimum photolithographic feature dimension used in lithographically patterning the substrate. Photoresist is deposited over the features. Such is patterned to form photoresist blocks that are individually received between a respective pair of the features in the cross-section. Individual of the features of the respective pairs have a laterally innermost sidewall in the cross-section. Individual of the photoresist blocks have an opposing pair of first pattern edges in the cross-section that are spaced laterally inward of the laterally innermost sidewalls of the respective pair of the features.Type: ApplicationFiled: February 4, 2014Publication date: June 5, 2014Applicant: Micron Technology, Inc.Inventors: William R. Brown, David Kewley, Adam Olson
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Patent number: 8673780Abstract: A method of processing a semiconductor substrate in forming scribe line alignment marks includes forming pitch multiplied non-circuitry features within scribe line area of a semiconductor substrate. Individual of the features, in cross-section, have a maximum width which is less than a minimum photolithographic feature dimension used in lithographically patterning the substrate. Photoresist is deposited over the features. Such is patterned to form photoresist blocks that are individually received between a respective pair of the features in the cross-section. Individual of the features of the respective pairs have a laterally innermost sidewall in the cross-section. Individual of the photoresist blocks have an opposing pair of first pattern edges in the cross-section that are spaced laterally inward of the laterally innermost sidewalls of the respective pair of the features.Type: GrantFiled: August 2, 2011Date of Patent: March 18, 2014Assignee: Micron Technology, Inc.Inventors: William R. Brown, David A. Kewley, Adam Olson
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Publication number: 20130059255Abstract: A method of lithographically patterning a substrate that has photoresist having removal areas and non-removal areas includes first exposing at least the non-removal areas to radiation effective to increase outer surface roughness of the photoresist in the non-removal areas at least post-develop but ineffective to change photoresist solubility in a developer for the photoresist to be cleared from the non-removal areas upon develop with the developer. Second exposing of radiation to the removal areas is conducted to be effective to change photoresist solubility in the developer for the photoresist to be cleared from the removal areas upon develop with the developer. The photoresist is developed with the developer effective to clear photoresist from the removal areas and to leave photoresist in the non-removal areas that has outer surface roughness in the non-removal areas which is greater than that before the first exposing. Other implementations and embodiments are contemplated.Type: ApplicationFiled: October 24, 2012Publication date: March 7, 2013Applicant: MICRON TECHNOLOGY, INC.Inventors: Yoshiki Hishiro, Scott Sills, Hiroyuki Mori, Troy Gugel, Paul D. Shirley, Lijing Gou, Adam Olson
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Patent number: 8309297Abstract: A method of lithographically patterning a substrate that has photoresist having removal areas and non-removal areas includes first exposing at least the non-removal areas to radiation effective to increase outer surface roughness of the photoresist in the non-removal areas at least post-develop but ineffective to change photoresist solubility in a developer for the photoresist to be cleared from the non-removal areas upon develop with the developer. Second exposing of radiation to the removal areas is conducted to be effective to change photoresist solubility in the developer for the photoresist to be cleared from the removal areas upon develop with the developer. The photoresist is developed with the developer effective to clear photoresist from the removal areas and to leave photoresist in the non-removal areas that has outer surface roughness in the non-removal areas which is greater than that before the first exposing. Other implementations and embodiments are contemplated.Type: GrantFiled: October 5, 2007Date of Patent: November 13, 2012Assignee: Micron Technology, Inc.Inventors: Yoshiki Hishiro, Scott Sills, Hiroyuki Mori, Troy Gugel, Paul D. Shirley, Lijing Gou, Adam Olson
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Publication number: 20110287630Abstract: A method of processing a semiconductor substrate in forming scribe line alignment marks includes forming pitch multiplied non-circuitry features within scribe line area of a semiconductor substrate. Individual of the features, in cross-section, have a maximum width which is less than a minimum photolithographic feature dimension used in lithographically patterning the substrate. Photoresist is deposited over the features. Such is patterned to form photoresist blocks that are individually received between a respective pair of the features in the cross-section. Individual of the features of the respective pairs have a laterally innermost sidewall in the cross-section. Individual of the photoresist blocks have an opposing pair of first pattern edges in the cross-section that are spaced laterally inward of the laterally innermost sidewalls of the respective pair of the features.Type: ApplicationFiled: August 2, 2011Publication date: November 24, 2011Applicant: MICRON TECHNOLOGY, INC.Inventors: William R. Brown, David Kewley, Adam Olson
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Patent number: 8003482Abstract: A method of processing a semiconductor substrate in forming scribe line alignment marks includes forming pitch multiplied non-circuitry features within scribe line area of a semiconductor substrate. Individual of the features, in cross-section, have a maximum width which is less than a minimum photolithographic feature dimension used in lithographically patterning the substrate. Photoresist is deposited over the features. Such is patterned to form photoresist blocks that are individually received between a respective pair of the features in the cross-section. Individual of the features of the respective pairs have a laterally innermost sidewall in the cross-section. Individual of the photoresist blocks have an opposing pair of first pattern edges in the cross-section that are spaced laterally inward of the laterally innermost sidewalls of the respective pair of the features.Type: GrantFiled: November 19, 2009Date of Patent: August 23, 2011Assignee: Micron Technology, Inc.Inventors: William R. Brown, David Kewley, Adam Olson
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Publication number: 20110117719Abstract: A method of processing a semiconductor substrate in forming scribe line alignment marks includes forming pitch multiplied non-circuitry features within scribe line area of a semiconductor substrate. Individual of the features, in cross-section, have a maximum width which is less than a minimum photolithographic feature dimension used in lithographically patterning the substrate. Photoresist is deposited over the features. Such is patterned to form photoresist blocks that are individually received between a respective pair of the features in the cross-section. Individual of the features of the respective pairs have a laterally innermost sidewall in the cross-section. Individual of the photoresist blocks have an opposing pair of first pattern edges in the cross-section that are spaced laterally inward of the laterally innermost sidewalls of the respective pair of the features.Type: ApplicationFiled: November 19, 2009Publication date: May 19, 2011Inventors: William R. Brown, David Kewley, Adam Olson
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Publication number: 20090092933Abstract: A method of lithographically patterning a substrate that has photoresist having removal areas and non-removal areas includes first exposing at least the non-removal areas to radiation effective to increase outer surface roughness of the photoresist in the non-removal areas at least post-develop but ineffective to change photoresist solubility in a developer for the photoresist to be cleared from the non-removal areas upon develop with the developer. Second exposing of radiation to the removal areas is conducted to be effective to change photoresist solubility in the developer for the photoresist to be cleared from the removal areas upon develop with the developer. The photoresist is developed with the developer effective to clear photoresist from the removal areas and to leave photoresist in the non-removal areas that has outer surface roughness in the non-removal areas which is greater than that before the first exposing. Other implementations and embodiments are contemplated.Type: ApplicationFiled: October 5, 2007Publication date: April 9, 2009Inventors: Yoshiki Hishiro, Scott Sills, Hiroyuki Mori, Troy Gugel, Paul D. Shirley, Lijing Gou, Adam Olson