Patents by Inventor Adam S. Hendrix

Adam S. Hendrix has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096439
    Abstract: In a compute express link (CXL) memory controller system, a system and method to identify memory errors which may require soft package repair or hard package repair to rows of DRAM memory. When data is written to a row of DRAM, the data is immediately and automatically read back and scanned for bit errors. If bit errors are identified, steps are taken to determine if the memory location requires no repair, soft repair, or hard repair. The data is corrected and written back to a new memory location which is memory-mapped to the original location, thus effecting the soft- or hard-repair. The present system and method does not repair the entire row of memory, but only repairs the specific die(s) that exhibit memory error in the row.
    Type: Application
    Filed: February 15, 2023
    Publication date: March 21, 2024
    Applicant: Micron Technology, Inc.
    Inventors: Amitava Majumdar, Greg S. Hendrix, Anandhavel Nagendrakumar, Krunal Patel, Kirthi Shenoy, Danilo Caraccio, Ankush Lal, Frank F. Ross, Adam D. Gailey
  • Publication number: 20240095120
    Abstract: In a memory controller system, a system and method to identify memory errors which may require soft package repair or hard package repair to rows of DRAM memory. When data is written to a row of DRAM, the data is immediately and automatically read back and scanned for bit errors. If bit errors are identified, the data is corrected and written back to the same memory location. The memory location is re-read. If bit errors are again identified, the memory location is marked for soft or hard repair. If, upon rereading the memory location, additional bit errors are identified, a historical record of memory errors is reviewed to determine if bit errors have occurred previously at the same memory location. If yes, the memory location is again marked for a soft post package repair or a hard post package repair.
    Type: Application
    Filed: February 15, 2023
    Publication date: March 21, 2024
    Applicant: Micron Technology, Inc.
    Inventors: Amitava Majumdar, Greg S. Hendrix, Anandhavel Nagendrakumar, Krunal Patel, Kirthi Shenoy, Danilo Caraccio, Ankush Lal, Frank F. Ross, Adam D. Gailey
  • Publication number: 20240096438
    Abstract: In a memory controller system, a system and method to identify memory errors which may require soft package repair or hard package repair to rows of DRAM memory. When data is written to a row of DRAM, the data is immediately and automatically read back and scanned for bit errors. If bit errors are identified, the data is corrected and written back to the same memory location. The memory location is re-read. If bit errors are again identified, the memory location is marked for soft or hard repair. If, upon rereading the memory location, additional bit errors are identified, a historical record of memory errors is reviewed to determine if bit errors have occurred previously at the same memory location. If yes, the memory location is again marked for a soft post package repair or a hard post package repair.
    Type: Application
    Filed: February 15, 2023
    Publication date: March 21, 2024
    Applicant: Micron Technology, Inc.
    Inventors: Amitava Majumdar, Greg S. Hendrix, Anandhavel Nagendrakumar, Krunal Patel, Kirthi Shenoy, Danilo Caraccio, Ankush Lal, Frank F. Ross, Adam D. Gailey
  • Patent number: 8284933
    Abstract: According to one embodiment, encrypting passwords includes performing the following for each input password of a plurality of input passwords to yield encrypted passwords, where at least two input passwords have different lengths and the encrypted passwords have the same length. An input password and a random number are received at logic configured to perform a key derivation operation comprising a pseudorandom function. An encryption key is derived from the input password and the random number according to the key derivation operation. The encryption key and a user identifier are received at logic configured to perform a cipher-based message authentication code (CMAC) function. An encrypted password is generated from the encryption key and the user identifier according to the CMAC function.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: October 9, 2012
    Assignee: CA, Inc.
    Inventors: Terry W. Chaisson, Adam S. Hendrix, Frederic A. H. Duminy
  • Publication number: 20100239087
    Abstract: According to one embodiment, encrypting passwords includes performing the following for each input password of a plurality of input passwords to yield encrypted passwords, where at least two input passwords have different lengths and the encrypted passwords have the same length. An input password and a random number are received at logic configured to perform a key derivation operation comprising a pseudorandom function. An encryption key is derived from the input password and the random number according to the key derivation operation. The encryption key and a user identifier are received at logic configured to perform a cipher-based message authentication code (CMAC) function. An encrypted password is generated from the encryption key and the user identifier according to the CMAC function.
    Type: Application
    Filed: March 19, 2009
    Publication date: September 23, 2010
    Applicant: Computer Associates Think, Inc.
    Inventors: Terry W. Chaisson, Adam S. Hendrix, Frederic A.H. Duminy