Patents by Inventor Adarsh Mittal

Adarsh Mittal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Computer Architecture with Register Name Addressing and Dynamic Load Size Adjustment
    Publication number: 20230089349
    Abstract: A computer architecture allows load instructions to fetch from cache memory “fat” loads having more data than necessary to satisfy execution of the load instruction, for example, loading a full cache line instead of a required word. The fat load allows load instructions having spatiotemporal locality to share the data of the fat load avoiding cache accesses.
    Type: Application
    Filed: September 21, 2021
    Publication date: March 23, 2023
    Inventors: Gurindar Singh Sohi, Vanshika Baoni, Adarsh Mittal