Patents by Inventor Addison B. Jones

Addison B. Jones has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5440162
    Abstract: An ESD protection circuit for the pads of an integrated circuit (IC) using silicide-clad diffusions is disclosed. The circuit uses a robust N+ diode with N-well block, an output NFET and a large transient clamp, each with a distributed, integrated N-well drain resistor to prevent the IC from avalanching and leakage during the Human Body Model and Charged Device Model tests for ESD.
    Type: Grant
    Filed: July 26, 1994
    Date of Patent: August 8, 1995
    Assignee: Rockwell International Corporation
    Inventors: Eugene R. Worley, Addison B. Jones, Rajiv Gupta
  • Patent number: 4536882
    Abstract: A mask which is especially useful in X-ray lithography wherein the X-ray absorber material is embedded in the mask membrane.
    Type: Grant
    Filed: February 7, 1980
    Date of Patent: August 20, 1985
    Assignee: Rockwell International Corporation
    Inventors: Addison B. Jones, Siegfried G. Plonski
  • Patent number: 4459937
    Abstract: An improvement in the method of forming polymerization resists by directing high energy particles such as electron beams along a path across a vacuum chamber and onto polymerizable molecular species at a substrate surface with sufficient energy to polymerize the polymerizable molecular species in situ is provided, comprising maintaining a chamber-isolated relatively higher pressure layer of polymerizable molecular species vapor locally at the substrate surface during, e.g. electron beam exposure to form the resist while maintaining the beam path free of polymerizable molecular species during beam traverse of the chamber. Polymerization resist generation apparatus is also provided comprising a high energy particle, e.g.
    Type: Grant
    Filed: July 12, 1982
    Date of Patent: July 17, 1984
    Assignee: Rockwell International Corporation
    Inventor: Addison B. Jones
  • Patent number: 4432134
    Abstract: A method of forming a superconductor-barrier-superconductor junction device by the steps of depositing a first superconductive layer on a substrate, forming a barrier layer on the first superconductive layer and depositing a second superconductive layer on the barrier layer. A layer of photoresist is then deposited over the second superconductive layer and patterned together with the second superconductive layer to form a mesa structure. A dielectric layer is deposited over the mesa structure, and the photoresist layer portion is dissolved thereby lifting off the dielectric portion overlying said second superconductive layer portion.
    Type: Grant
    Filed: May 10, 1982
    Date of Patent: February 21, 1984
    Assignee: Rockwell International Corporation
    Inventors: Addison B. Jones, Francis M. Erdmann
  • Patent number: 4407859
    Abstract: A bubble domain device and the method of manufacturing microcircuits having multi-level conductor patterns, which includes forming on a substrate a horizontally extended first level conductor material pattern in pre-configured, relatively overwidth channels defined by a first insulator material layer on the substrate, depositing additional insulator material atop the first level conductor material, and the first insulator layer in channel backfilling relation. The additional insulator material defines a planar surface uniformly spaced above the substrate. The method then includes forming a second upper level conductor material pattern at least partially opposite the first level conductor material pattern and on the additional insulator material surface. The second upper level conductor material pattern being uniformly spaced relative to the substrate by the additional insulator material surface.
    Type: Grant
    Filed: October 17, 1980
    Date of Patent: October 4, 1983
    Assignee: Rockwell International Corporation
    Inventor: Addison B. Jones
  • Patent number: 4406252
    Abstract: The invention is a thin film alloy source utilizing a supply of alloy wire selected for deposition onto a substrate. The wire is advanced through an induction heating means at a controlled rate for evaporation onto the substrate. Detection of the meniscus height or temperature of the end of the wire being evaporated yields a control signal for operating the control wire feed mechanism for advancing the wire at a rate to provide a predetermined coating thickness.
    Type: Grant
    Filed: December 29, 1980
    Date of Patent: September 27, 1983
    Assignee: Rockwell International Corporation
    Inventor: Addison B. Jones
  • Patent number: 4400407
    Abstract: The invention is an apparatus and method for achieving thin film deposition, of uniform composition, from evaporated alloys. A source of wire alloy, selected for the particular thin film deposition on a substrate, is continuously fed through a region of high speed electron bombardment confined to an end of the wire, for evaporation of the wire in the vicinity of the substrate. An ion flux detector controls the rate of feeding of the wire source in accordance with the detected flux to lay down a uniform thin film of predetermined thickness. A high potential is established between the wire and the source of the electrons and the liberated electrons are guided by the electric field toward the end of the wire being evaporated, which serves as an anode.
    Type: Grant
    Filed: July 15, 1981
    Date of Patent: August 23, 1983
    Assignee: Rockwell International Corporation
    Inventor: Addison B. Jones
  • Patent number: 4396479
    Abstract: The invention is a method of minimizing redeposition of thin film material being removed by ion impact via a patterned resist mask, which invention determines the resist mask etching rates in selected atmospheres and determines the material etching rates in selected atmospheres. Then the mask thickness is selected relative to the material thickness, the ambient gases, and the ion beam parameters to cause the resist mask to be faceted to the edges of underlying material as the unprotected layer is removed such that no resist walls remain to receive redeposited material.
    Type: Grant
    Filed: April 30, 1982
    Date of Patent: August 2, 1983
    Assignee: Rockwell International Corporation
    Inventor: Addison B. Jones
  • Patent number: 4382975
    Abstract: The invention is a thin film alloy source utilizing a supply of alloy wire selected for deposition onto a substrate. The wire is advanced through an induction heating means at a controlled rate for evaporation onto the substrate. Detection of the meniscus height or temperature of the end of the wire being evpaorated yields a control signal for operating the control wire feed mechanism for advancing the wire at a rate to provide a predetermined coating thickness.
    Type: Grant
    Filed: July 15, 1981
    Date of Patent: May 10, 1983
    Assignee: Rockwell International Corporation
    Inventor: Addison B. Jones
  • Patent number: 4368689
    Abstract: The invention is an apparatus and method for achieving thin film deposition, of uniform composition, from evaporated alloys. A source of wire alloy, selected for the particular thin film deposition on a substrate, is continuously fed through a region of high speed electron bombardment confined to an end of the wire, for evaporation of the wire in the vicinity of the substrate. An ion flux detector controls the rate of feeding of the wire source in accordance with the detected flux to lay down a uniform thin film of predetermined thickness. A high potential is established between the wire and the source of the electrons and the liberated electrons are guided by the electric field toward the end of the wire being evaporated, which serves as an anode.
    Type: Grant
    Filed: December 29, 1980
    Date of Patent: January 18, 1983
    Assignee: Rockwell International Corporation
    Inventor: Addison B. Jones
  • Patent number: 4357364
    Abstract: An improvement in the method of forming polymerization resists by directing high energy particles such as electron beams along a path across a vacuum chamber and onto polymerizable molecular species at a substrate surface with sufficient energy to polymerize the polymerizable molecular species in situ is provided, comprising maintaining a chamber-isolated relatively higher pressure layer of polymerizable molecular species vapor locally at the substrate surface during, e.g. electron beam exposure to form the resist while maintaining the beam path free of polymerizable molecular species during beam traverse of the chamber. Polymerization resist generation apparatus is also provided comprising a high energy particle, e.g.
    Type: Grant
    Filed: April 27, 1981
    Date of Patent: November 2, 1982
    Assignee: Rockwell International Corporation
    Inventor: Addison B. Jones
  • Patent number: 4339305
    Abstract: The method of manufacturing predetermined microcircuit conductor patterns, which includes forming on the surface plane of a substrate a layer of insulator material, forming a layer of resist on the layer of insulator material, patterning the layer of resist to define a channel pattern, etching the channel pattern with relatively overwide channels, conditioning the channel bases to receive plating material, and thereafter filling the overwide channels with the plating material to a height at least substantially co-planar with the insulator material to define the predetermined conductor patterns, removing the mask and plated material thereon to uncover completely the conductor pattern.
    Type: Grant
    Filed: February 5, 1981
    Date of Patent: July 13, 1982
    Assignee: Rockwell International Corporation
    Inventor: Addison B. Jones
  • Patent number: 4337132
    Abstract: The invention is a method of minimizing redeposition of thin film material being removed by ion impact via a patterned resist mask, which invention determines the resist mask etching rates in selected atmospheres and determines the material etching rates in selected atmospheres. Then the mask thickness is selected relative to the material thickness, the ambient gases, and the ion beam parameters to cause the resist mask to be faceted to the edges of underlying material as the unprotected layer is removed such that no resist walls remain to receive redeposited material.
    Type: Grant
    Filed: November 14, 1980
    Date of Patent: June 29, 1982
    Assignee: Rockwell International Corporation
    Inventor: Addison B. Jones
  • Patent number: 4326936
    Abstract: The invention is a method of sloping thin film materials so that smooth, continuous films may be deposited thereon. By controlling the thickness of resist mask over the materials (as for patterning) relative to ion milling or sputter etching parameters, repeatable slopes and linewidths may be achieved. For use in bubble memory fabrication, the sloping of conductor walls enables propagation bars to be laid down in crossing over relation thereto while enhancing yield.
    Type: Grant
    Filed: October 14, 1980
    Date of Patent: April 27, 1982
    Assignee: Rockwell International Corporation
    Inventor: Addison B. Jones
  • Patent number: 4284678
    Abstract: There is described a unique mask and method of making same. The mask is especially useful in high resolution fabrication techniques such as in making magnetic bubble domain structures, semiconductor device structures and the like. The mask includes a relatively thin membrane of suitable density and material to be substantially transparent to various types of radiation such as, but not limited to, E-beams, x-rays and the like. A pattern of material which is substantially opaque to the same radiation is provided on the membrane. To the extent necessary, a suitable auxiliary support member is attached to the membrane for supporting same.
    Type: Grant
    Filed: January 17, 1980
    Date of Patent: August 18, 1981
    Assignee: Rockwell International Corporation
    Inventor: Addison B. Jones
  • Patent number: 4268951
    Abstract: Semiconductor devices with gate dimensions as small as 0.25 microns square have been fabricated using electron beam lithography and dry processing techniques. In particular, silicon gate, N-channel, metal-oxide-semiconductor (NMOS) field-effect-transistors (FET) have been produced. The devices and the process are especially adapted to bulk silicon based transistors.
    Type: Grant
    Filed: November 13, 1978
    Date of Patent: May 26, 1981
    Assignee: Rockwell International Corporation
    Inventors: Michael T. Elliott, Michael R. Splinter, Addison B. Jones, John P. Reekstin
  • Patent number: 4193687
    Abstract: There is provided a technique and apparatus for aligning a mask to a substrate with high precision using Moire fringe effects produced by superimposing diffraction gratings. The gratings comprise first and second patterns of horizontal and vertical lines and spaces, respectively. The first pattern comprises horizontal and vertical lines and spaces of a first width. The second pattern comprises horizontal and vertical lines of a second width which differs from the lines in the first pattern by a small amount .DELTA.. The patterns are superimposed to provide a Moire fringe effect. When alignment occurs, a symmetrical pattern is provided. If misalignment in the X, Y or .theta. coordinate occurs, an assymmetrical or skewed pattern of Moire fringe effects is generated.
    Type: Grant
    Filed: June 5, 1978
    Date of Patent: March 18, 1980
    Assignee: Rockwell International Corporation
    Inventors: John P. Reekstin, Sigfried G. Plonski, Addison B. Jones
  • Patent number: 4194233
    Abstract: There is described a unique apparatus which is especially useful with very thin masks used in X-ray lithography, transmission electron lithography or electron projection lithography. The apparatus includes temperature stabilization means for counteracting the deleterious effects in the mask caused by absorption of energy from the energy source as well as positioning means for precisely spacing thin masks for proximity lithography techniques. The thermal effects are counteracted by providing a chuck which supports the substrate to be acted upon. A thermally conductive layer, for example a fluid or other conformable medium, can be provided between the substrate and the chuck. The mask is similarly spaced from the substrate by a thin layer of thermally conductive material, for example, a low pressure gas which is capable of passing the energy in question. The precise spacing of the mask is controlled by the use of a source which establishes an electrostatic charge between the substrate and the mask.
    Type: Grant
    Filed: January 30, 1978
    Date of Patent: March 18, 1980
    Assignee: Rockwell International Corporation
    Inventors: Addison B. Jones, David B. Wittry
  • Patent number: 4139051
    Abstract: A method and apparatus for providing temporary thermal contact between a part being processed and a heat sink is disclosed. A tacky, insert, polymer film is applied to establish intimate contact with the part and the heat sink. Since the polymer layer has greater cohesive strength than adhesive strength, the part may be separated cleanly from the polymer film with substantially no contamination. The part does adhere with sufficient force to permit improved processing such as ion etching, sputter deposition and etching, ion beam deposition, vacuum evaporation, plasma etching, reactive ion etching, chemical vapor deposition, and ion implantation without overheating. The heat sink is mounted in a supporting fixture having pressure means and vacuum means associated therewith. The vacuum means is used for pulling the device wafer onto the coated heat sink. The pressure means is used to dismount the wafer from the heat sink without physical damage or contamination.
    Type: Grant
    Filed: September 7, 1976
    Date of Patent: February 13, 1979
    Assignee: Rockwell International Corporation
    Inventors: Addison B. Jones, William R. Fewer