Abstract: A clock distribution network having: a main trunk configured to provide a differential clock signal; a plurality of branches coupled to the main trunk for distributing the differential clock signal to a plurality of circuit elements on the integrated circuit; and a plurality of switches coupling the main trunk to the plurality of branches.

Abstract: A clock distribution network having: a main trunk configured to provide a differential clock signal; a plurality of branches coupled to the main trunk for distributing the differential clock signal to a plurality of circuit elements on the integrated circuit; and a plurality of switches coupling the main trunk to the plurality of branches.

Abstract: A clock distribution network having: a backbone clock signal line configured to provide a differential clock signal; multiple branches coupled to the backbone clock signal line for distributing the differential clock signal to multiple programmable function elements; a first leaf node coupled to a first branch, where the first leaf node is configured to provide the differential clock signal to a first programmable function element; and a second leaf node coupled to a second branch, where the second leaf node is configured to provide a single ended clock signal derived from the differential clock signal to a second programmable function element.

Abstract: A clock distribution network having: a backbone clock signal line configured to provide a differential clock signal; multiple branches coupled to the backbone clock signal line for distributing the differential clock signal to multiple programmable function elements; a first leaf node coupled to a first branch, where the first leaf node is configured to provide the differential clock signal to a first programmable function element; and a second leaf node coupled to a second branch, where the second leaf node is configured to provide a single ended clock signal derived from the differential clock signal to a second programmable function element.

Abstract: A clock distribution network having: a main trunk configured to provide a differential clock signal; a plurality of branches coupled to the main trunk for distributing the differential clock signal to a plurality of circuit elements on the integrated circuit; and a plurality of switches coupling the main trunk to the plurality of branches.

Abstract: A system for distributing a small signal differential signal to a circuit element. The system includes: a first converter configured to convert a first small signal differential signal to a first two phase full CMOS differential signal for input into the differential multiplexer; and a programmable driver circuit configured to boost an output current of the programmable driver circuit at selected frequencies and to convert two phase full CMOS differential signal outputs of the differential multiplexer to a second small signal differential signal.