Patents by Inventor ADEDOTUN ADEDEJI ADEYEMO

ADEDOTUN ADEDEJI ADEYEMO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memristor based logic gate
    Patent number: 10860291
    Abstract: A logic gate includes first and second inputs, first through fourth memristors each having a positive terminal and a negative terminal, and first and second outputs. The memristors are connected in a bridge arrangement: the negative terminal of the first memristor and the positive terminal of the second memristor are connected to the first input; the negative terminal of the third memristor and the positive terminal of the fourth memristor are connected to the second input; the negative terminal of the second memristor and the negative terminal of the fourth memristor are connected to the first output; and the positive terminal of the first memristor and the positive terminal of the third memristor are connected to the second output. A voltage of at least one of the outputs, or the voltage difference between the outputs, corresponds to the result of a logic operation relative to voltages applied to the inputs.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: December 8, 2020
    Assignee: OXFORD BROOKES UNIVERSITY
    Inventors: Abusaleh Muhammad Jabir, Xiaohan Yang, Adedotun Adedeji Adeyemo
  • MEMRISTOR BASED LOGIC GATE
    Publication number: 20190056915
    Abstract: A logic gate includes first and second inputs, first through fourth memristors each having a positive terminal and a negative terminal, and first and second outputs. The memristors are connected in a bridge arrangement: the negative terminal of the first memristor and the positive terminal of the second memristor are connected to the first input; the negative terminal of the third memristor and the positive terminal of the fourth memristor are connected to the second input; the negative terminal of the second memristor and the negative terminal of the fourth memristor are connected to the first output; and the positive terminal of the first memristor and the positive terminal of the third memristor are connected to the second output. A voltage of at least one of the outputs, or the voltage difference between the outputs, corresponds to the result of a logic operation relative to voltages applied to the inputs.
    Type: Application
    Filed: February 20, 2017
    Publication date: February 21, 2019
    Inventors: ABUSALEH MUHAMMAD JABIR, XIAOHAN YANG, ADEDOTUN ADEDEJI ADEYEMO