Abstract: A method of forming a microfluidic device is disclosed. The method includes forming a first dielectric layer on a substrate, forming electrodes partially into the first dielectric layer, and forming a second dielectric layer on the electrodes. The method includes filling, with a metal material, two wells formed in the second dielectric layer such that the metal material is in direct contact with the electrodes. The method includes forming a third dielectric layer on the metal material and second dielectric layer. The method includes filling, with a structural material, a channel formed between the wells such that the structural material does not directly contact the electrodes. The method includes forming a fourth dielectric layer on the third dielectric layer and the structural material, extracting the structural material through at least one vent hole in the fourth dielectric layer, and forming a fifth dielectric layer on the fourth dielectric layer.

Abstract: A method of forming a microfluidic device is disclosed. The method includes forming a first dielectric layer on a substrate, forming electrodes partially into the first dielectric layer, and forming a second dielectric layer on the electrodes. The method includes filling, with a metal material, two wells formed in the second dielectric layer such that the metal material is in direct contact with the electrodes. The method includes forming a third dielectric layer on the metal material and second dielectric layer. The method includes filling, with a structural material, a channel formed between the wells such that the structural material does not directly contact the electrodes. The method includes forming a fourth dielectric layer on the third dielectric layer and the structural material, extracting the structural material through at least one vent hole in the fourth dielectric layer, and forming a fifth dielectric layer on the fourth dielectric layer.

Abstract: A semiconductor device structure and method for forming the same is disclosed. The structure incudes a silicon substrate having at least one trench disposed therein. An electrical and ionic insulating layer is disposed over at least a top surface of the substrate. A plurality of energy storage device layers is formed within the one trench. The plurality of layers includes at least a cathode-based active electrode having a thickness of, for example, at least 100 nm and an internal resistance of, for example, less than 50 Ohms/cm2. The method includes forming at least one trench in a silicon substrate. An electrical and ionic insulating layer(s) is formed and disposed over at least a top surface of the silicon substrate. A plurality of energy storage device layers is formed within the trench. Each layer of the plurality of energy storage device layers is independently processed and integrated into the trench.

Abstract: A semiconductor device structure and method for forming the same is disclosed. The structure incudes a silicon substrate having at least one trench disposed therein. An electrical and ionic insulating layer is disposed over at least a top surface of the substrate. A plurality of energy storage device layers is formed within the one trench. The plurality of layers includes at least a cathode-based active electrode having a thickness of, for example, at least 100 nm and an internal resistance of, for example, less than 50 Ohms/cm2. The method includes forming at least one trench in a silicon substrate. An electrical and ionic insulating layer(s) is formed and disposed over at least a top surface of the silicon substrate. A plurality of energy storage device layers is formed within the trench. Each layer of the plurality of energy storage device layers is independently processed and integrated into the trench.

Abstract: A method for forming a semiconductor includes forming at least one trench in a silicon substrate. The at least one trench provides an energy storage device containment feature. An electrical and ionic insulating layer(s) is formed on a top surface of the substrate and sidewalls of the trench. A plurality of vias is formed through a base of the trench. The plurality of vias is filled with a metal material. A trench base current collector at the base of the trench and backside current collector at the backside of the substrate are formed from the metal material. These current collectors enable electric and thermal conductive planarization and device isolation through the substrate. A plurality of energy storage device layers is formed over the trench base current collector, and a topside current collector is formed over the plurality of energy storage device layers. A protective encapsulation layer may then be formed.

Abstract: A method for forming a semiconductor includes forming at least one trench in a silicon substrate. The at least one trench provides an energy storage device containment feature. An electrical and ionic insulating layer(s) is formed on a top surface of the substrate and sidewalls of the trench. A plurality of vias is formed through a base of the trench. The plurality of vias is filled with a metal material. A trench base current collector at the base of the trench and backside current collector at the backside of the substrate are formed from the metal material. These current collectors enable electric and thermal conductive planarization and device isolation through the substrate. A plurality of energy storage device layers is formed over the trench base current collector, and a topside current collector is formed over the plurality of energy storage device layers. A protective encapsulation layer may then be formed.

Abstract: A semiconductor device structure and method for forming the same is disclosed. The structure incudes a silicon substrate having at least one trench disposed therein. An electrical and ionic insulating layer is disposed over at least a top surface of the substrate. A plurality of energy storage device layers is formed within the one trench. The plurality of layers includes at least a cathode-based active electrode having a thickness of, for example, at least 100 nm and an internal resistance of, for example, less than 50 Ohms/cm2. The method includes forming at least one trench in a silicon substrate. An electrical and ionic insulating layer(s) is formed and disposed over at least a top surface of the silicon substrate. A plurality of energy storage device layers is formed within the trench. Each layer of the plurality of energy storage device layers is independently processed and integrated into the trench.