Patents by Inventor Adimulam Ramesh Babu
Adimulam Ramesh Babu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250061537Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may configure a BVH structure including a plurality of levels and a plurality of nodes, the BVH structure being associated with geometry data for a plurality of primitives in a scene. The apparatus may also identify an amount of storage in a GMEM that is available for storing at least some of the plurality of nodes in the BVH structure. Further, the apparatus may allocate the BVH structure into a first BVH section including a plurality of first nodes and a second BVH section including a plurality of second nodes. The apparatus may also store first data associated with the plurality of first nodes in the GMEM and second data associated with the plurality of first nodes and the plurality of second nodes in a system memory.Type: ApplicationFiled: January 19, 2023Publication date: February 20, 2025Inventors: Adimulam RAMESH BABU, Srihari Babu ALLA, David Kirk MCALLISTER
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Publication number: 20250046015Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for exploiting spatial locality to speed up first-hit ray BVH traversals. A processor may generate a bounding volume hierarchy (BVH) hit map based a set of pixels, where the BVH hit map includes entries indicative of intersection information for a set of rays associated with the set of pixels, and where the BVH hit map corresponds to a BVH. The processor may select an entry from the entries of the BVH hit map based on pixel coordinate information for the set of pixels. The processor may traverse the BVH from a node of the BVH associated with the selected entry.Type: ApplicationFiled: August 2, 2023Publication date: February 6, 2025Inventors: Alfredo Olegario SAUCEDO, Srihari Babu ALLA, Adimulam RAMESH BABU
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Publication number: 20250022204Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for adaptive BVH rebuilds with biased cost functions for dynamic geometry. A graphics processor may obtain an indication of first BVH structure(s) including first nodes, where the first BVH structure(s) are representative of first geometry data for first primitives in first frame(s), where each of the first nodes is associated with first primitive(s), may detect a number of rays that intersect each of the first BVH structure(s) from direction(s) associated with the first frame(s), may update a cost function based on the number of rays and each of the direction(s), and may configure, based on the updated cost function, second BVH structure(s) including second nodes, where the second BVH structure(s) are representative of second geometry data for second primitives in second frame(s), where each of the second nodes is associated with second primitive(s).Type: ApplicationFiled: July 12, 2023Publication date: January 16, 2025Inventors: Adimulam RAMESH BABU, Srihari Babu ALLA, Alfredo Olegario SAUCEDO, Avinash SEETHARAMAIAH, Jonnala Gadda NAGENDRA KUMAR
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Patent number: 12100186Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU or CPU. The apparatus may allocate each of a plurality of primitives in a scene into one of a plurality of bounding boxes, each of the plurality of bounding boxes corresponding to a plurality of nodes including internal nodes and leaf nodes. The apparatus may also identify whether each of the plurality of nodes is one of the internal nodes or one of the leaf nodes. Further, the apparatus may estimate a compressibility of each of the plurality of nodes if the node is one of the leaf nodes, the compressibility of the node corresponding to whether the node is compressible. The apparatus may also compress data corresponding to each of the plurality of nodes if the node is estimated to be compressible.Type: GrantFiled: February 4, 2022Date of Patent: September 24, 2024Assignee: QUALCOMM IncorporatedInventors: Adimulam Ramesh Babu, Srihari Babu Alla, David Kirk McAllister
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Patent number: 11978151Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may obtain an indication of a BVH structure including a plurality of nodes, wherein the BVH structure is associated with geometry data for a plurality of primitives in a scene, wherein each of the plurality of nodes is associated with one or more primitives, where a first level BVH includes a set of first nodes and a second level BVH includes a set of second nodes. The apparatus may also allocate information for a plurality of second nodes in the set of second nodes to at least one first node in the set of first nodes. Further, the apparatus may store the allocated information for the plurality of second nodes in the set of second nodes in the at least one first node in the set of first nodes.Type: GrantFiled: August 31, 2022Date of Patent: May 7, 2024Assignee: QUALCOMM IncorporatedInventors: Adimulam Ramesh Babu, Srihari Babu Alla, Avinash Seetharamaiah, Jonnala Gadda Nagendra Kumar
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Publication number: 20240070964Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may obtain an indication of a BVH structure including a plurality of nodes, wherein the BVH structure is associated with geometry data for a plurality of primitives in a scene, wherein each of the plurality of nodes is associated with one or more primitives, where a first level BVH includes a set of first nodes and a second level BVH includes a set of second nodes. The apparatus may also allocate information for a plurality of second nodes in the set of second nodes to at least one first node in the set of first nodes. Further, the apparatus may store the allocated information for the plurality of second nodes in the set of second nodes in the at least one first node in the set of first nodes.Type: ApplicationFiled: August 31, 2022Publication date: February 29, 2024Inventors: Adimulam RAMESH BABU, Srihari Babu ALLA, Avinash SEETHARAMAIAH, Jonnala Gadda NAGENDRA KUMAR
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Patent number: 11893677Abstract: Systems and techniques are provided for widening a hierarchical structure for ray tracing. For instance, a process can include obtaining a plurality of primitives of a scene object included in a first hierarchical acceleration data structure and determining one or more candidate hierarchical acceleration data structures each including the plurality of primitives. A cost metric can be determined for the one or more candidate hierarchical acceleration data structures and, based on the cost metric, a compressibility prediction associated with a candidate hierarchical acceleration data structure of the one or more candidate hierarchical acceleration data structures can be determined. An output hierarchical acceleration data structure can be generated based on the compressibility prediction.Type: GrantFiled: July 29, 2022Date of Patent: February 6, 2024Assignee: QUALCOMM IncorporatedInventors: Adimulam Ramesh Babu, Srihari Babu Alla, Avinash Seetharamaiah, Jonnala Gadda Nagendra Kumar, David Kirk McAllister
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Publication number: 20240037840Abstract: Systems and techniques are provided for widening a hierarchical structure for ray tracing. For instance, a process can include obtaining a plurality of primitives of a scene object included in a first hierarchical acceleration data structure and determining one or more candidate hierarchical acceleration data structures each including the plurality of primitives. A cost metric can be determined for the one or more candidate hierarchical acceleration data structures and, based on the cost metric, a compressibility prediction associated with a candidate hierarchical acceleration data structure of the one or more candidate hierarchical acceleration data structures can be determined. An output hierarchical acceleration data structure can be generated based on the compressibility prediction.Type: ApplicationFiled: July 29, 2022Publication date: February 1, 2024Inventors: Adimulam RAMESH BABU, Srihari Babu ALLA, Avinash SEETHARAMAIAH, Jonnala Gadda NAGENDRA KUMAR, David Kirk MCALLISTER
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Publication number: 20230252685Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU or CPU. The apparatus may allocate each of a plurality of primitives in a scene into one of a plurality of bounding boxes, each of the plurality of bounding boxes corresponding to a plurality of nodes including internal nodes and leaf nodes. The apparatus may also identify whether each of the plurality of nodes is one of the internal nodes or one of the leaf nodes. Further, the apparatus may estimate a compressibility of each of the plurality of nodes if the node is one of the leaf nodes, the compressibility of the node corresponding to whether the node is compressible. The apparatus may also compress data corresponding to each of the plurality of nodes if the node is estimated to be compressible.Type: ApplicationFiled: February 4, 2022Publication date: August 10, 2023Inventors: Adimulam RAMESH BABU, Srihari Babu ALLA, David Kirk MCALLISTER
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Patent number: 11593990Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may configure a BVH structure including a plurality of levels and a plurality of nodes, the BVH structure being associated with geometry data for a plurality of primitives in a scene. The apparatus may also identify an amount of storage in a GMEM that is available for storing at least some of the plurality of nodes in the BVH structure. Further, the apparatus may allocate the BVH structure into a first BVH section including a plurality of first nodes and a second BVH section including a plurality of second nodes. The apparatus may also store first data associated with the plurality of first nodes in the GMEM and second data associated with the plurality of first nodes and the plurality of second nodes in a system memory.Type: GrantFiled: February 4, 2022Date of Patent: February 28, 2023Assignee: QUALCOMM IncorporatedInventors: Adimulam Ramesh Babu, Srihari Babu Alla, David Kirk McAllister
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Patent number: 11176734Abstract: The present disclosure relates to methods and apparatus for graphics processing. An example method generally includes receiving, at a graphics processing unit (GPU), a plurality of commands corresponding to a plurality of draws across a frame, each of the plurality of commands indicating a depth test direction with respect to a low-resolution depth (LRZ) buffer for the corresponding draw. The method generally includes maintaining, at the GPU, a LRZ status buffer to store a corresponding depth test direction for a first command in time of the plurality of commands processed by the GPU. The method generally includes disabling, at the GPU, use of the LRZ buffer for depth testing for any of the plurality of commands remaining unprocessed after processing a command of the plurality of commands having a different depth test direction than the corresponding depth test direction stored in the LRZ status buffer.Type: GrantFiled: October 6, 2020Date of Patent: November 16, 2021Assignee: QUALCOMM IncorporatedInventors: Srihari Babu Alla, Adimulam Ramesh Babu, Jonnala Gadda Nagendra Kumar, Avinash Seetharamaiah, Tao Wang, Xuefeng Tang, Thomas Edwin Frisinger, Andrew Evan Gruber