Abstract: Methods, systems and computer program products for generating a functional logic cone signature for circuit analysis are provided. Aspects include for each of a plurality of portions of a circuit diagram of a circuit, tracing the respective portion of the circuit diagram to identify circuit components associated with the respective portion of the circuit diagram from a starting latch to one of one or more source latches. Circuit components include circuit elements and circuit connections. Aspects include generating an ASCII representation of the respective identified circuit components for each of the plurality of portions of the circuit diagram of the circuit. Aspects include generating a plurality of hash values by applying a hashing function to each ASCII representation. Each hash value corresponds to one of the plurality of portions of the circuit diagram. Aspects also include storing the hash values in a data structure.