Patents by Inventor Aditya Vikram Daga

Aditya Vikram Daga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10708197
    Abstract: Various embodiments of a virtual output queue system within a network element enables per-input port virtual output queues within a network data processor of the network element. In one embodiment, each port managed by a network data processor has an associated set of virtual output queues for each output port on the network data element. In one embodiment, network data processor hardware supports per-processor VOQs and per-input port VOQs are enabled in hardware for layer 3 forwarding by overloading layer 2 forwarding logic. In such embodiment, a mapping table is generated to enable virtual per-input port VOQs for layer 3 forwarding logic using layer 2 logic that is otherwise unused during layer 3 forwarding. In one embodiment, multiple traffic classes can be managed per-input port when using per-input port VOQs. In one embodiment, equal cost multi-path (ECMP) and link aggregation support is also enabled.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: July 7, 2020
    Assignee: Arista Networks, Inc.
    Inventors: Francois Labonte, Aditya Vikram Daga
  • Publication number: 20180198736
    Abstract: Various embodiments of a virtual output queue system within a network element enables per-input port virtual output queues within a network data processor of the network element. In one embodiment, each port managed by a network data processor has an associated set of virtual output queues for each output port on the network data element. In one embodiment, network data processor hardware supports per-processor VOQs and per-input port VOQs are enabled in hardware for layer 3 forwarding by overloading layer 2 forwarding logic. In such embodiment, a mapping table is generated to enable virtual per-input port VOQs for layer 3 forwarding logic using layer 2 logic that is otherwise unused during layer 3 forwarding. In one embodiment, multiple traffic classes can be managed per-input port when using per-input port VOQs. In one embodiment, equal cost multi-path (ECMP) and link aggregation support is also enabled.
    Type: Application
    Filed: March 8, 2018
    Publication date: July 12, 2018
    Inventors: Francois Labonte, Aditya Vikram Daga
  • Patent number: 9942171
    Abstract: Various embodiments of a virtual output queue system within a network element enables per-input port virtual output queues within a network data processor of the network element. In one embodiment, each port managed by a network data processor has an associated set of virtual output queues for each output port on the network data element. In one embodiment, network data processor hardware supports per-processor VOQs and per-input port VOQs are enabled in hardware for layer 3 forwarding by overloading layer 2 forwarding logic. In such embodiment, a mapping table is generated to enable virtual per-input port VOQs for layer 3 forwarding logic using layer 2 logic that is otherwise unused during layer 3 forwarding. In one embodiment, multiple traffic classes can be managed per-input port when using per-input port VOQs. In one embodiment, equal cost multi-path (ECMP) and link aggregation support is also enabled.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: April 10, 2018
    Assignee: Arista Networks, Inc.
    Inventors: Francois Labonte, Aditya Vikram Daga
  • Publication number: 20170005951
    Abstract: Various embodiments of a virtual output queue system within a network element enables per-input port virtual output queues within a network data processor of the network element. In one embodiment, each port managed by a network data processor has an associated set of virtual output queues for each output port on the network data element. In one embodiment, network data processor hardware supports per-processor VOQs and per-input port VOQs are enabled in hardware for layer 3 forwarding by overloading layer 2 forwarding logic. In such embodiment, a mapping table is generated to enable virtual per-input port VOQs for layer 3 forwarding logic using layer 2 logic that is otherwise unused during layer 3 forwarding. In one embodiment, multiple traffic classes can be managed per-input port when using per-input port VOQs. In one embodiment, equal cost multi-path (ECMP) and link aggregation support is also enabled.
    Type: Application
    Filed: January 6, 2016
    Publication date: January 5, 2017
    Inventors: Francois Labonte, Aditya Vikram Daga