Abstract: A method and apparatus for controlling read-in and read-out of serial or parallel packet-oriented data signals with respect to a buffer in a communication terminal provides for the identification of a packet start bit combination in incoming packet-oriented data signals before initialization of the reading of the data signals into the buffer and initialization for reading out the data signals after a prescribed delay time with reading terminated after the identification of a packet end bit combination and/or a bit combination indicating stuffing bits between end and start bit combinations. Read-out is terminated after the identification of a packet end bit combination or of a bit combination indicating stuffing information at the data output of the buffer or given equality of the read-in and read-out addresses, assuming a packet end bit combination and/or a bit combination indicating stuffing information is identified at the data output of the buffer.

Abstract: In a terminal equipment connected to a packet-oriented, ring-shaped network, a comparator identifies the beginning and the presence of a start of packet information after a series-to-parallel conversion of the data bit stream, whereby filler information are transmitted between the packets. With the recognition of the beginning of the start of packet information, a counter arranged in a byte clock generator is arrested and is reset given the presence of the complete start of packet information so that an internal, current byte clock pulse is lengthened and, therefore, the packet byte clock is synchronized with the byte clock inherent in the terminal equipment.