Patents by Inventor Adolf Baumann
Adolf Baumann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230207036Abstract: A digital system includes a non-volatile calculating register having a set of latches configured to perform a calculation. A set of non-volatile storage cells is coupled to the set of latches. Access detection logic is coupled to the calculating register and is operable to initiate a calculation of a next value by the calculating register each time the calculating register is accessed by an accessing module. The access detection logic is operable to cause the next value to be stored in the set of non-volatile storage cells at the completion of the calculation as an atomic transaction. After a power loss or other restore event, the contents of the calculating register may be restored from the non-volatile storage cells.Type: ApplicationFiled: March 7, 2023Publication date: June 29, 2023Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Adolf Baumann, Mark Jung
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Patent number: 11600351Abstract: A digital system includes a non-volatile calculating register having a set of latches configured to perform a calculation. A set of non-volatile storage cells is coupled to the set of latches. Access detection logic is coupled to the calculating register and is operable to initiate a calculation of a next value by the calculating register each time the calculating register is accessed by an accessing module. The access detection logic is operable to cause the next value to be stored in the set of non-volatile storage cells at the completion of the calculation as an atomic transaction. After a power loss or other restore event, the contents of the calculating register may be restored from the non-volatile storage cells.Type: GrantFiled: November 23, 2020Date of Patent: March 7, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Adolf Baumann, Mark Jung
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Publication number: 20210104288Abstract: A digital system includes a non-volatile calculating register having a set of latches configured to perform a calculation. A set of non-volatile storage cells is coupled to the set of latches. Access detection logic is coupled to the calculating register and is operable to initiate a calculation of a next value by the calculating register each time the calculating register is accessed by an accessing module. The access detection logic is operable to cause the next value to be stored in the set of non-volatile storage cells at the completion of the calculation as an atomic transaction. After a power loss or other restore event, the contents of the calculating register may be restored from the non-volatile storage cells.Type: ApplicationFiled: November 23, 2020Publication date: April 8, 2021Inventors: Adolf Baumann, Mark Jung
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Patent number: 10847242Abstract: A digital system includes a non-volatile calculating register having a set of latches configured to perform a calculation. A set of non-volatile storage cells is coupled to the set of latches. Access detection logic is coupled to the calculating register and is operable to initiate a calculation of a next value by the calculating register each time the calculating register is accessed by an accessing module. The access detection logic is operable to cause the next value to be stored in the set of non-volatile storage cells at the completion of the calculation as an atomic transaction. After a power loss or other restore event, the contents of the calculating register may be restored from the non-volatile storage cells.Type: GrantFiled: November 26, 2014Date of Patent: November 24, 2020Assignee: Texas Instruments IncorporatedInventors: Adolf Baumann, Mark Jung
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Publication number: 20160027511Abstract: A digital system includes a non-volatile calculating register having a set of latches configured to perform a calculation. A set of non-volatile storage cells is coupled to the set of latches. Access detection logic is coupled to the calculating register and is operable to initiate a calculation of a next value by the calculating register each time the calculating register is accessed by an accessing module. The access detection logic is operable to cause the next value to be stored in the set of non-volatile storage cells at the completion of the calculation as an atomic transaction. After a power loss or other restore event, the contents of the calculating register may be restored from the non-volatile storage cells.Type: ApplicationFiled: November 26, 2014Publication date: January 28, 2016Inventors: Adolf Baumann, Mark Jung
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Publication number: 20140189367Abstract: An electronic device for encrypting and decrypting data blocks of a message having n data blocks in accordance with the data encryption standard (DES) has a first data processing channel having a first processing stage for performing encryption and decryption of data blocks of a predefined length, and a second data processing channel having a second processing stage for performing encryption and decryption of data blocks. The electronic device also has a control stage (FSM) for controlling the first processing stage and the second processing stage, so as to perform an encryption or decryption step with the second processing stage on an encrypted/decrypted data block output from the first processing stage, and to control the second processing stage to compute a message authentication code over the encrypted or decrypted message received from the first processing stage block-by-block.Type: ApplicationFiled: January 24, 2014Publication date: July 3, 2014Applicant: Texas Instruments Deutschland GmbHInventors: Arni Ingimundarson, Adolf Baumann
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Patent number: 8576604Abstract: An embodiment of semiconductor device including a control unit and an FRAM storage unit is disclosed. The FRAM storage unit contains FRAM cells. The control unit includes a predetermined test data pattern. The control unit is configured to read the FRAM cells that contain a test data pattern in a margin-mode, compare the read out bit information with the test data pattern to determine whether a bit error is present in the dedicated FRAM cells. When a bit error is present, the control unit is configured to read-out the complete FRAM storage unit in a recovery-mode and refresh all FRAM cells of the FRAM storage unit by writing back the read out bit information to the respective FRAM cells. In the margin-mode, the read operation is performed using a lower read-sensitivity compared to the read operation reading out the complete FRAM storage unit that is performed in the recovery-mode.Type: GrantFiled: February 6, 2012Date of Patent: November 5, 2013Assignee: Texas Instruments IncorporatedInventors: Adolf Baumann, Christian Sichert
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Patent number: 8415956Abstract: An electronic device is provided, which includes a current supplying stage which is adapted to supply a first compensation current and a second compensation current to a first wire or a second wire, wherein the first compensation current is determined during a first clock period, when the first wire and the second wire are connected. The second compensation current is determined during a second clock period while the first wire and the second wire are not connected and the magnitude of the second current represents a ratio of a resistance value of the first wire and a resistance value of the second wire.Type: GrantFiled: December 22, 2009Date of Patent: April 9, 2013Assignee: Texas Instruments Deutschland GmbHInventors: Oliver Nehrig, Adolf Baumann, Ralph Ledwa
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Publication number: 20120206957Abstract: An embodiment of semiconductor device including a control unit and an FRAM storage unit is disclosed. The FRAM storage unit contains FRAM cells. The control unit includes a predetermined test data pattern. The control unit is configured to read the FRAM cells that contain a test data pattern in a margin-mode, compare the read out bit information with the test data pattern to determine whether a bit error is present in the dedicated FRAM cells. When a bit error is present, the control unit is configured to read-out the complete FRAM storage unit in a recovery-mode and refresh all FRAM cells of the FRAM storage unit by writing back the read out bit information to the respective FRAM cells. In the margin-mode, the read operation is performed using a lower read-sensitivity compared to the read operation reading out the complete FRAM storage unit that is performed in the recovery-mode.Type: ApplicationFiled: February 6, 2012Publication date: August 16, 2012Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Adolf Baumann, Christian Sichert
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Patent number: 7855595Abstract: An ASK demodulator for use in an RFID transponder having a limiter circuit associated with the antenna circuit and converting the ASK antenna field strength modulation into an ASK limiter current modulation by limiting the antenna voltage to a fixed value and thereby causing the limiter current to be substantially proportional to the ASK antenna field strength, and a current discriminator circuit that discriminates the ASK limiter current modulation. By converting the field strength modulation into a proportional limiter current and discriminating that limiter current, a linear relationship and a stable demodulator sensitivity are achieved. The current discrimination can be made accurately under low-voltage conditions.Type: GrantFiled: July 30, 2008Date of Patent: December 21, 2010Assignee: Texas Instruments Deutschland GmbHInventors: Oliver Nehrig, Carlo Peschke, Ernst Muellner, Adolf Baumann, Jens Graul
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Publication number: 20100156433Abstract: An electronic device is provided, which includes a current supplying stage which is adapted to supply a first compensation current and a second compensation current to a first wire or a second wire, wherein the first compensation current is determined during a first clock period, when the first wire and the second wire are connected. The second compensation current is determined during a second clock period while the first wire and the second wire are not connected and the magnitude of the second current represents a ratio of a resistance value of the first wire and a resistance value of the second wire.Type: ApplicationFiled: December 22, 2009Publication date: June 24, 2010Applicant: Texas Instruments DeutschlandInventors: Oliver Nehrig, Adolf Baumann, Ralph Ledwa
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Publication number: 20090189688Abstract: An ASK demodulator for use in an RFID transponder having a limiter circuit associated with the antenna circuit and converting the ASK antenna fieldstrength modulation into an ASK limiter current modulation by limiting the antenna voltage to a fixed value and thereby causing the limiter current to be substantially proportional to the ASK antenna field strength, and a current discriminator circuit that discriminates the ASK limiter current modulation. By converting the fieldstrength modulation into a proportional limiter current and discriminating that limiter current, a linear relationship and a stable demodulator sensitivity are achieved. The current discrimination can be made accurately under low-voltage conditions.Type: ApplicationFiled: July 30, 2008Publication date: July 30, 2009Applicant: TEXAS INSTRUMENTS DEUTSCHLAND GMBHInventors: Olivier Nehrig, Carlo Peschke, Ernst Muellner, Adolf Baumann, Jens Graul
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Publication number: 20090147947Abstract: An electronic device for encrypting and decrypting data blocks of a message having n data blocks in accordance with the data encryption standard (DES) is provided. The electronic device has a first data processing channel having a first processing stage for performing encryption and decryption of data blocks of a predefined length, and a first input data buffer coupled to a data input and to the first processing stage, and a second data processing channel having a second processing stage for performing encryption and decryption of data blocks, a second data input buffer coupled to an output of the first processing stage and to the second processing stage. The electronic device also has a control stage (FSM) for controlling the first processing stage and the second processing stage, so as to perform an encryption or decryption step with the second processing stage on an encrypted/decrypted data block output from the first processing stage.Type: ApplicationFiled: November 4, 2008Publication date: June 11, 2009Applicant: Texas Instruments Deutschland GmbHInventors: Arni Ingimundarson, Adolf Baumann
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Patent number: 6806783Abstract: In a circuit assembly for generating pulses sustaining or “plucking” RF oscillations in a resonant circuit (12) of transponder (10) having no battery power supply in which the supply voltage needed for its operation is obtained from a RF carrier oscillation pulse defined in time exciting the resonant circuit into oscillation and used to charge a storage element whose charging voltage forms the supply voltage, a plucking pulse is generated every time the amplitude of the RF oscillations drops below a defined threshold value and its momentary value is in a defined relationship to a reference voltage (VPEAK) changing in time as the charging voltage of a capacitor (70). A switch (24) is provided which can be switched on for the duration of the plucking pulse (PLUCK) for connecting the storage element (20) to the resonant circuit (12).Type: GrantFiled: February 20, 2002Date of Patent: October 19, 2004Assignee: Texas Instruments Deutschland GmbHInventors: Adolf Baumann, Harald Parzhuber
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Patent number: 6674359Abstract: Transponders present in an interrogation zone can be identified by an interrogator by it sending an RF interrogation signal into the interrogation zone, the RF interrogation signal containing a code string prompting the transponders to generate partial addresses. As soon as one transponder “sees” that the generated partial address agrees with part of its own address, it responds by sending its full address which can then be read by the interrogator. Immediately after having received a full address the interrogator sends a code string characterizing the address of the transponder having responded before so that this transponder is thereby addressable. The signal sent by the interrogator to the transponder with this code string also contains an instruction which prompts the transponder to assume the condition in which it no longer responds to receiving its address or partial address.Type: GrantFiled: August 3, 2000Date of Patent: January 6, 2004Assignee: Texas Instruments IncorporatedInventors: Konstantin Aslanidis, Simon Atherton, Adolf Baumann, Thomas Flaxl, Andreas Hagl
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Publication number: 20020119751Abstract: In a circuit assembly for generating pulses sustaining or “plucking” RF oscillations in a resonant circuit (12) of transponder (10) having no battery power supply in which the supply voltage needed for its operation is obtained from a RF carrier oscillation pulse defined in time exciting the resonant circuit into oscillation and used to charge a storage element whose charging voltage forms the supply voltage, a plucking pulse is generated every time the amplitude of the RF oscillations drops below a defined threshold value and its momentary value is in a defined relationship to a reference voltage (VPEAK) changing in time as the charging voltage of a capacitor (70). A switch (24) is provided which can be switched on for the duration of the plucking pulse (PLUCK) for connecting the storage element (20) to the resonant circuit (12).Type: ApplicationFiled: February 20, 2002Publication date: August 29, 2002Inventors: Adolf Baumann, Harald Parzhuber
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Patent number: 6133834Abstract: A method of tuning the resonance frequency of a transponder to a target frequency is described, wherein a transponder comprises a film antenna with an IC (IC) mounted to the film antenna (L) and an integrated resonance capacitor (C) is part of a IC. During testing of IC at chip probe to determine the pass/fail of the IC, the integrated resonance capacitor (C) is measured and the value is stored with the pass/fail data of the wafer map. Then after mounting a passed IC (IC) to a film antenna (L) with variable inductance, retrieve the integrated resonance capacitance value from the wafer map and calculate the amount of inductance necessary to achieve the target frequency. Tune the film antenna (L) to achieve the necessary inductance, measure the transponder resonance frequency, and compare the transponder resonance frequency to the target frequency.Type: GrantFiled: March 7, 1998Date of Patent: October 17, 2000Assignee: Texas Instruments Deutschland, GmbHInventors: Gerhard Eberth, Heiner Brenninger, Alfons Lichtenegger, Christian Ecker, Adolf Baumann, Wolfgang Ramin, Johann Hoffmann, Konstantin Aslanidis